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From: Andrew Morton <akpm@osdl.org>
To: ebiederm@xmission.com (Eric W. Biederman)
Cc: "Yinghai Lu" <yinghai.lu@amd.com>, "Greg KH" <gregkh@suse.de>,
	"Andi Kleen" <ak@suse.de>,
	linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: [Patch] PCI: check szhi when sz is 0 for 64 bit pref mem
Date: Wed, 8 Nov 2006 11:10:41 -0800	[thread overview]
Message-ID: <20061108111041.09adcee2.akpm@osdl.org> (raw)
In-Reply-To: <m18xil4x8j.fsf@ebiederm.dsl.xmission.com>

On Wed, 08 Nov 2006 11:19:40 -0700
ebiederm@xmission.com (Eric W. Biederman) wrote:

> Andrew Morton <akpm@osdl.org> writes:
> 
> > On Fri, 3 Nov 2006 21:27:35 -0800
> > "Yinghai Lu" <yinghai.lu@amd.com> wrote:
> >
> >> For co-prcessor with mem installed, the ram will be treated to pref mem.
> >
> > What is "pref mem"?
> 
> Memory mapped base address registers can be either normal or for prefetchable
> sections of memory mapped I/O.  Frequently all prefetchable bars are 64bit.
> The prefetchable bars are also frequently ask for the largest amounts of
> memory.  So it is easy and worthwhile to place all prefetchable bars about 4G.
> 
> The "pref mem" short hand comes from a the LinuxBIOS print statements that
> report every bar value and what kind of bar it is, during boot up.
> 

Ah.  Prefetchable.  Thanks.

I've basically given up in exhaustion on that patch.  Maybe when I have a
burst of extra energy I'll go back and take the time to understand it,
or maybe when Greg comes back he'll save me.


  reply	other threads:[~2006-11-08 19:10 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2006-11-04  5:27 Yinghai Lu
2006-11-06 22:04 ` Andrew Morton
2006-11-08 18:19   ` Eric W. Biederman
2006-11-08 19:10     ` Andrew Morton [this message]
2006-11-06 22:15 Lu, Yinghai
2006-11-07  0:04 ` Andrew Morton
2006-11-07  4:35   ` Yinghai Lu
2006-11-08 19:15 Lu, Yinghai
2006-11-10  0:50 ` Greg KH

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