From: Andi Kleen <andi@firstfloor.org>
To: Ingo Molnar <mingo@elte.hu>
Cc: Andi Kleen <andi@firstfloor.org>,
davej@codemonkey.org.uk, tglx@linutronix.de,
linux-kernel@vger.kernel.org, "H. Peter Anvin" <hpa@zytor.com>
Subject: Re: [PATCH] Use global TLB flushes in MTRR code
Date: Fri, 8 Feb 2008 12:44:19 +0100 [thread overview]
Message-ID: <20080208114419.GB4745@one.firstfloor.org> (raw)
In-Reply-To: <20080207203705.GA19083@elte.hu>
> because it's not just an open-coded __tlb_flush_all(), it _disables PGE
> and keeps it so while the MTRR's are changed on all CPUs_.
Yes and?
>
> Your patch adds __flush_tlb_all() which re-enables the PGE bit in cr4,
> see asm-x86/tlbflush.h:
>
> /* clear PGE */
> write_cr4(cr4 & ~X86_CR4_PGE);
> /* write old PGE again and flush TLBs */
> write_cr4(cr4);
>
> so we'll keep PGE enabled during the MTRR setting - which changes
> behavior.
It changes behaviour in some minor ways but I don't think it makes any
difference. PGE only influences TLB flushes (according to its
specification) and all the TLB flushes still run with PGE disabled.
-Andi
next prev parent reply other threads:[~2008-02-08 11:09 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-02-07 19:02 Andi Kleen
2008-02-07 19:08 ` Oliver Pinter
2008-02-07 19:13 ` Ingo Molnar
2008-02-07 20:03 ` Andi Kleen
2008-02-07 20:37 ` Ingo Molnar
2008-02-08 11:44 ` Andi Kleen [this message]
2008-02-09 9:40 ` Ingo Molnar
2008-02-09 11:48 ` Andi Kleen
2008-02-09 11:47 ` Ingo Molnar
2008-02-09 14:12 ` Andi Kleen
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