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* x86_64: tss_struct layout does not match comments  !?
@ 2008-07-03 10:47 Richard Kennedy
  2008-07-03 11:39 ` Ingo Molnar
  0 siblings, 1 reply; 5+ messages in thread
From: Richard Kennedy @ 2008-07-03 10:47 UTC (permalink / raw)
  To: Ingo Molnar; +Cc: lkml

Hi Ingo,

the comments in the definition of tss_struct suggests is should be
cacheline aligned ( or 256 byte aligned ? ) :- 

|struct tss_struct {
|....
|	/*
|	 * Pad the TSS to be cacheline-aligned (size is 0x100):
|	 */
|	unsigned long		__cacheline_filler[35];
|	/*
|	 * .. and then another 0x100 bytes for the emergency kernel stack:
|	 */
|	unsigned long		stack[64];
|
|} __attribute__((packed));

However on a 64 bit build the size of tss_struct is 9136,
cacheline_filler is 280 and stack size is 512 at offset 8624.
None of which are cacheline aligned.

I'm guessing this isn't what was intended.

do you know what the original intention was ?

1. struct tss_struct{...} __cacheline_aligned;
or just
2. struct tss_struct {
...
long stack[64] __cacheline_aligned;
}

Richard



^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: x86_64: tss_struct layout does not match comments  !?
  2008-07-03 10:47 x86_64: tss_struct layout does not match comments !? Richard Kennedy
@ 2008-07-03 11:39 ` Ingo Molnar
  2008-07-03 11:57   ` Richard Kennedy
  2008-07-04 12:56   ` [PATCH] x86: cacheline_align tss_struct Richard Kennedy
  0 siblings, 2 replies; 5+ messages in thread
From: Ingo Molnar @ 2008-07-03 11:39 UTC (permalink / raw)
  To: Richard Kennedy; +Cc: lkml, the arch/x86 maintainers


* Richard Kennedy <richard@rsk.demon.co.uk> wrote:

> Hi Ingo,
> 
> the comments in the definition of tss_struct suggests is should be
> cacheline aligned ( or 256 byte aligned ? ) :- 
> 
> |struct tss_struct {
> |....
> |	/*
> |	 * Pad the TSS to be cacheline-aligned (size is 0x100):
> |	 */
> |	unsigned long		__cacheline_filler[35];
> |	/*
> |	 * .. and then another 0x100 bytes for the emergency kernel stack:
> |	 */
> |	unsigned long		stack[64];
> |
> |} __attribute__((packed));
> 
> However on a 64 bit build the size of tss_struct is 9136,
> cacheline_filler is 280 and stack size is 512 at offset 8624.
> None of which are cacheline aligned.
> 
> I'm guessing this isn't what was intended.
> 
> do you know what the original intention was ?
> 
> 1. struct tss_struct{...} __cacheline_aligned;
> or just
> 2. struct tss_struct {
> ...
> long stack[64] __cacheline_aligned;
> }

#1 is the intent - because each CPU has a separate TSS. init_tss.stack 
is really just an emergency static stack we have in place for very early 
exceptions.

i think the __cacheline_filler could be removed safely. Mind sending a 
patch for that?

	Ingo

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: x86_64: tss_struct layout does not match comments  !?
  2008-07-03 11:39 ` Ingo Molnar
@ 2008-07-03 11:57   ` Richard Kennedy
  2008-07-04 12:56   ` [PATCH] x86: cacheline_align tss_struct Richard Kennedy
  1 sibling, 0 replies; 5+ messages in thread
From: Richard Kennedy @ 2008-07-03 11:57 UTC (permalink / raw)
  To: Ingo Molnar; +Cc: lkml, the arch/x86 maintainers


On Thu, 2008-07-03 at 13:39 +0200, Ingo Molnar wrote:
> * Richard Kennedy <richard@rsk.demon.co.uk> wrote:
> 
> > Hi Ingo,
> > 
> > the comments in the definition of tss_struct suggests is should be
> > cacheline aligned ( or 256 byte aligned ? ) :- 
> > 
> > |struct tss_struct {
> > |....
> > |	/*
> > |	 * Pad the TSS to be cacheline-aligned (size is 0x100):
> > |	 */
> > |	unsigned long		__cacheline_filler[35];
> > |	/*
> > |	 * .. and then another 0x100 bytes for the emergency kernel stack:
> > |	 */
> > |	unsigned long		stack[64];
> > |
> > |} __attribute__((packed));
> > 
> > However on a 64 bit build the size of tss_struct is 9136,
> > cacheline_filler is 280 and stack size is 512 at offset 8624.
> > None of which are cacheline aligned.
> > 
> > I'm guessing this isn't what was intended.
> > 
> > do you know what the original intention was ?
> > 
> > 1. struct tss_struct{...} __cacheline_aligned;
> > or just
> > 2. struct tss_struct {
> > ...
> > long stack[64] __cacheline_aligned;
> > }
> 
> #1 is the intent - because each CPU has a separate TSS. init_tss.stack 
> is really just an emergency static stack we have in place for very early 
> exceptions.
> 
> i think the __cacheline_filler could be removed safely. Mind sending a 
> patch for that?
> 
> 	Ingo

No problem.
Richard 


^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH] x86: cacheline_align tss_struct
  2008-07-03 11:39 ` Ingo Molnar
  2008-07-03 11:57   ` Richard Kennedy
@ 2008-07-04 12:56   ` Richard Kennedy
  2008-07-04 14:48     ` Ingo Molnar
  1 sibling, 1 reply; 5+ messages in thread
From: Richard Kennedy @ 2008-07-04 12:56 UTC (permalink / raw)
  To: Ingo Molnar; +Cc: lkml, the arch/x86 maintainers

The manual padding to align on cacheline size only worked in 32 bit
In 64 bit the structure was not aligned and contained wasted space.
    
use the compiler ____cachline_aligned to save space & properly align
this structure.
    
x86_64_default size goes from 9136 -> 8960
x86_64_AMD     size goes from 9136 -> 8896
    
    
Signed-off-by: Richard Kennedy <richard@rsk.demon.co.uk>
---

Hi Ingo
here's the patch.
built & running on 2.6.26-rc8.

Richard



diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h
index 5591052..4ab2ede 100644
--- a/include/asm-x86/processor.h
+++ b/include/asm-x86/processor.h
@@ -263,15 +263,11 @@ struct tss_struct {
 	struct thread_struct	*io_bitmap_owner;
 
 	/*
-	 * Pad the TSS to be cacheline-aligned (size is 0x100):
-	 */
-	unsigned long		__cacheline_filler[35];
-	/*
 	 * .. and then another 0x100 bytes for the emergency kernel stack:
 	 */
 	unsigned long		stack[64];
 
-} __attribute__((packed));
+} ____cacheline_aligned;
 
 DECLARE_PER_CPU(struct tss_struct, init_tss);
 



^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] x86: cacheline_align tss_struct
  2008-07-04 12:56   ` [PATCH] x86: cacheline_align tss_struct Richard Kennedy
@ 2008-07-04 14:48     ` Ingo Molnar
  0 siblings, 0 replies; 5+ messages in thread
From: Ingo Molnar @ 2008-07-04 14:48 UTC (permalink / raw)
  To: Richard Kennedy; +Cc: lkml, the arch/x86 maintainers


* Richard Kennedy <richard@rsk.demon.co.uk> wrote:

> The manual padding to align on cacheline size only worked in 32 bit
> In 64 bit the structure was not aligned and contained wasted space.
>     
> use the compiler ____cachline_aligned to save space & properly align
> this structure.
>     
> x86_64_default size goes from 9136 -> 8960
> x86_64_AMD     size goes from 9136 -> 8896

applied to tip/x86/cleanups - thanks Richard!

	Ingo

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2008-07-04 14:48 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2008-07-03 10:47 x86_64: tss_struct layout does not match comments !? Richard Kennedy
2008-07-03 11:39 ` Ingo Molnar
2008-07-03 11:57   ` Richard Kennedy
2008-07-04 12:56   ` [PATCH] x86: cacheline_align tss_struct Richard Kennedy
2008-07-04 14:48     ` Ingo Molnar

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