From: Ingo Molnar <mingo@elte.hu>
To: Andreas Herrmann <andreas.herrmann3@amd.com>
Cc: Valdis.Kletnieks@vt.edu, Thomas Gleixner <tglx@linutronix.de>,
linux-kernel@vger.kernel.org, "H. Peter Anvin" <hpa@zytor.com>
Subject: Re: [PATCH] x86: c1e_idle: don't mark TSC unstable if CPU has invariant TSC
Date: Sat, 20 Sep 2008 08:14:57 +0200 [thread overview]
Message-ID: <20080920061457.GE25713@elte.hu> (raw)
In-Reply-To: <20080919172019.GA16896@alberich.amd.com>
* Andreas Herrmann <andreas.herrmann3@amd.com> wrote:
> Currently the kernel assumes TSC is stable and there are various
> places where Linux might spot when TSC is unstable. c1e_idle is one
> such place. But it's wrong to mark TSC unstable for all AMD CPUs in
> this function as newer CPU families have TSC's that are P- and C-state
> invariant.
i agree with the purpose of the patch (as it flags the first really sane
TSC implementation on x86!!!) - but it would be nice to indicate this in
a different CPU feature bit other than X86_FEATURE_CONSTANT_TSC, to
reduce confusion. Perhaps introduce a virtual CPU feature bit for that?
Ingo
next prev parent reply other threads:[~2008-09-20 6:15 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-09-18 19:12 Andreas Herrmann
2008-09-18 19:35 ` Valdis.Kletnieks
2008-09-19 17:20 ` Andreas Herrmann
2008-09-19 18:21 ` Thomas Gleixner
2008-09-20 6:14 ` Ingo Molnar [this message]
2008-09-23 5:42 ` Andreas Herrmann
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