From: Andi Kleen <andi@firstfloor.org>
To: akpm@linux-foundation.org, mingo@elte.hu, tglx@linutronix.de,
hpa@zytor.com, linux-kernel@vger.kernel.org
Subject: [PATCH] [1/9] x86: CMCI: Export MAX_NR_BANKS
Date: Thu, 12 Feb 2009 13:49:30 +0100 (CET) [thread overview]
Message-ID: <20090212124930.3F5E63E666E@basil.firstfloor.org> (raw)
In-Reply-To: <20090212149.227733077@firstfloor.org>
Move MAX_NR_BANKS into mce.h because it's needed there
for followup patches.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
---
arch/x86/include/asm/mce.h | 6 ++++++
arch/x86/kernel/cpu/mcheck/mce_64.c | 6 ------
2 files changed, 6 insertions(+), 6 deletions(-)
Index: linux/arch/x86/include/asm/mce.h
===================================================================
--- linux.orig/arch/x86/include/asm/mce.h 2009-02-12 11:30:51.000000000 +0100
+++ linux/arch/x86/include/asm/mce.h 2009-02-12 12:10:18.000000000 +0100
@@ -95,6 +95,12 @@
DECLARE_PER_CPU(struct sys_device, device_mce);
extern void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu);
+/*
+ * To support more than 128 would need to escape the predefined
+ * Linux defined extended banks first.
+ */
+#define MAX_NR_BANKS (MCE_EXTENDED_BANK - 1)
+
#ifdef CONFIG_X86_MCE_INTEL
void mce_intel_feature_init(struct cpuinfo_x86 *c);
#else
Index: linux/arch/x86/kernel/cpu/mcheck/mce_64.c
===================================================================
--- linux.orig/arch/x86/kernel/cpu/mcheck/mce_64.c 2009-02-12 11:30:51.000000000 +0100
+++ linux/arch/x86/kernel/cpu/mcheck/mce_64.c 2009-02-12 12:10:18.000000000 +0100
@@ -37,12 +37,6 @@
#define MISC_MCELOG_MINOR 227
-/*
- * To support more than 128 would need to escape the predefined
- * Linux defined extended banks first.
- */
-#define MAX_NR_BANKS (MCE_EXTENDED_BANK - 1)
-
atomic_t mce_entry;
static int mce_dont_init;
next prev parent reply other threads:[~2009-02-12 12:51 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-02-12 12:49 [PATCH] [0/9] x86: CMCI: Add support for Intel CMCI Andi Kleen
2009-02-12 12:49 ` Andi Kleen [this message]
2009-02-12 12:49 ` [PATCH] [2/9] x86: CMCI: Factor out threshold interrupt handler Andi Kleen
2009-02-12 12:49 ` [PATCH] [3/9] x86: CMCI: Avoid potential reentry of threshold interrupt Andi Kleen
2009-02-12 12:49 ` [PATCH] [4/9] x86: MCE: Replace machine check events logged interval with ratelimit Andi Kleen
2009-02-12 12:49 ` [PATCH] [5/9] x86: CMCI: Use polled banks bitmap in machine check poller Andi Kleen
2009-02-12 12:49 ` [PATCH] [6/9] x86: CMCI: Define MSR names and fields for new CMCI registers Andi Kleen
2009-02-12 12:49 ` [PATCH] [7/9] x86: CMCI: Add CMCI support Andi Kleen
2009-02-12 12:49 ` [PATCH] [8/9] x86: CMCI: Disable CMCI on rebooting Andi Kleen
2009-02-12 12:49 ` [PATCH] [9/9] x86: CMCI: Recheck CMCI banks after APIC has been enabled on CPU #0 Andi Kleen
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