From: Ingo Molnar <mingo@elte.hu>
To: Andreas Herrmann <andreas.herrmann3@amd.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>,
Thomas Gleixner <tglx@linutronix.de>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] x86: introduce cpuinfo->cpu_node_id to reflect topology of multi-node CPU
Date: Wed, 6 May 2009 13:44:23 +0200 [thread overview]
Message-ID: <20090506114423.GM25203@elte.hu> (raw)
In-Reply-To: <20090504173450.GG28728@alberich.amd.com>
* Andreas Herrmann <andreas.herrmann3@amd.com> wrote:
> Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
> ---
> arch/x86/include/asm/processor.h | 2 ++
> arch/x86/kernel/cpu/common.c | 2 ++
> arch/x86/kernel/cpu/proc.c | 1 +
> arch/x86/kernel/smpboot.c | 5 ++++-
> 4 files changed, 9 insertions(+), 1 deletions(-)
>
> diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
> index 0b2fab0..b49d72b 100644
> --- a/arch/x86/include/asm/processor.h
> +++ b/arch/x86/include/asm/processor.h
> @@ -106,6 +106,8 @@ struct cpuinfo_x86 {
> u16 booted_cores;
> /* Physical processor id: */
> u16 phys_proc_id;
> + /* Node id in case of multi-node processor: */
> + u16 cpu_node_id;
btw., do you have any plans to propagate this information into the
scheduler domains tree?
Another level of domains, to cover the two internal nodes, would do
the trick nicely and automatically. This would work even if the BIOS
does not provide information and we have to go to lowlevel registers
or CPUID to recover it.
This can be done even if there's no SRAT. (there's no SRAT because
say due to interleaving there's no real NUMA structure of memory.
But there's still CPU scheduling differences worth expressing.)
Ingo
next prev parent reply other threads:[~2009-05-06 11:45 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-05-04 17:33 [PATCH 0/3] x86: adapt CPU topology detection for AMD Magny-Cours Andreas Herrmann
2009-05-04 17:34 ` [PATCH 1/3] x86: introduce cpuinfo->cpu_node_id to reflect topology of multi-node CPU Andreas Herrmann
2009-05-06 11:44 ` Ingo Molnar [this message]
2009-05-06 16:14 ` Andreas Herrmann
2009-05-04 17:36 ` [PATCH 2/3] x86: fixup topology detection for AMD " Andreas Herrmann
2009-05-04 17:37 ` [PATCH 3/3] x86: cacheinfo: fixup L3 cache information " Andreas Herrmann
2009-05-04 17:44 ` [PATCH 0/3] x86: adapt CPU topology detection for AMD Magny-Cours Andreas Herrmann
2009-05-04 20:16 ` Andi Kleen
2009-05-05 9:22 ` Andreas Herrmann
2009-05-05 9:35 ` Andi Kleen
2009-05-05 10:48 ` Andreas Herrmann
2009-05-05 12:02 ` Andi Kleen
2009-05-05 14:40 ` Andreas Herrmann
2009-05-05 15:31 ` Andi Kleen
2009-05-05 16:47 ` Andreas Herrmann
2009-05-05 17:54 ` Andi Kleen
2009-05-08 14:28 ` Andreas Herrmann
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