Re: [PATCH v2] x86/apic: limit irq affinity

[Dimitri Sivanich <sivanich@sgi.com>]

On Wed, Oct 14, 2009 at 10:30:12PM -0700, Yinghai Lu wrote:
> Dimitri Sivanich wrote:
> > This patch allows for hard restrictions to irq affinity via a new cpumask and
> > device node value in the irq_cfg structure.
> > 
> > The mask forces IRQ affinity to remain within the specified cpu domain.
> > On some UV systems, this domain will be limited to the nodes accessible
> > to the given node.  Currently other X86 systems will have all bits in
> > the cpumask set, so non-UV systems will remain unaffected at this time.
> > 
> 
> can you check if we can reuse target_cpus for this purpose?
>
 
Yinghai,

The 'target_cpus' mask is in struct 'apic'.  It is a platform level mask
(only one mask per platform).

The 'allowed' mask that I am adding is a per irq level mask (one mask per irq).
Each irq might be coming from a device attached to a different node, and each
of those nodes might require its irqs to have a different mask.

For example, say there is a pci device attached to node 2.  Node 2 might only
want (or be able) to route its interrupts to nodes 0-127.  It would have
'allowed' mask allowing only processors existing on the first 128 nodes.  A
pci device attached to node 150 would have a different allowed mask, since it
would route its interrupts to a different set of nodes.

Use of something like 'target_cpus' would require recalculating this every
time someone changes affinity, instead of just 'and'ing in the mask.

Dimitri