Re: [PATCH v2] PCI: Always set prefetchable base/limit upper32 registers

[Grant Grundler <grundler@parisc-linux.org>]

On Tue, Dec 01, 2009 at 12:40:03PM -0800, Yinghai Lu wrote:
...
> > I assumed Yinghai's objection was based on a specific problem he had
> > seen with writing upper32 register. Bjorn asked the right question.
> > If there isn't a specific problem, I'd prefer AW's simpler patch.
> 
> we just should not touch that register if the HW only support 32bit pref mmio.

Why not?

I agree the PCI-PCI spec defines how to determine if a PCI Bridge supports
64-bit Pref MMIO (using upper32 - or not). But spec also doesn't prohibit
writing to a read-only register.  Writing this Read-Only register so far
hasn't caused any problems.

> > I'm also thinking the resource allocation design which uses resource
> > flags to indicate resources assigned (e.g a resource is 32-bit) rather
> > than HW attributes is broken. We should be able to allocate 32-bit Option
> > ROM into a 64-bit prefetchable MMIO window that is programmed with upper32
> > as zeros without changing the resource type. The resource allocation
> > code only be looking at Resource "Type" when (re)programming
> > window registers. The rest of the time (programming BARs) should be
> > able to just test "if it fits".
> 
> IORESOURCE_MEM_64 is the flags that the resource could be assigned to >4g range.
> so it is NOT assigned resource ...

*shrug* I don't have time to work on the broader issue.

thanks,
grant