From: Ingo Molnar <mingo@elte.hu>
To: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>, Don Zickus <dzickus@redhat.com>,
Linux kernel mailing list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH -tip] perf, x86: P4 PMU - Add missing read of a counter before test
Date: Thu, 24 Mar 2011 17:33:32 +0100 [thread overview]
Message-ID: <20110324163332.GA2414@elte.hu> (raw)
In-Reply-To: <4D8B6569.2030001@gmail.com>
* Cyrill Gorcunov <gorcunov@gmail.com> wrote:
> On 03/24/2011 11:48 AM, Ingo Molnar wrote:
> >
> > * Cyrill Gorcunov <gorcunov@gmail.com> wrote:
> >
> >> Don, I've added yours SOB, ok? (The patch is attached to avoid
> >> space/tabs problem
> >> due to web-mail client)
> >
> > The patch lacks a proper description about the motivation and effects of the
> > patch.
> >
> > Thanks,
> >
> > Ingo
>
> Ingo, does this one looks better?
>
> ---
> From: Don Zickus <dzickus@redhat.com>
> Subject: [PATCH -tip] perf, x86: P4 PMU - Add missing read of MSR register to catch unflagged overflows
>
> The read of a proper MSR register was missed so instead of a counter the
> configration register is tested (it has ARCH_P4_UNFLAGGED_BIT always cleared)
> and unflagged overflows never have been catched. Fix it by reading a proper
> MSR register.
So what effect does this have on the regular perf user? Please try to describe
the real-life effect of the bug/problem fixed here.
Thanks,
Ingo
next prev parent reply other threads:[~2011-03-24 16:33 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-03-24 8:29 Cyrill Gorcunov
2011-03-24 8:48 ` Ingo Molnar
2011-03-24 9:33 ` Cyrill Gorcunov
2011-03-24 15:38 ` Cyrill Gorcunov
2011-03-24 16:33 ` Ingo Molnar [this message]
2011-03-24 16:46 ` Cyrill Gorcunov
2011-03-24 16:47 ` Cyrill Gorcunov
2011-03-24 16:51 ` Ingo Molnar
2011-03-24 17:06 ` Cyrill Gorcunov
2011-03-24 18:22 ` Don Zickus
2011-03-24 18:26 ` Cyrill Gorcunov
2011-03-24 20:03 ` Ingo Molnar
2011-03-24 12:28 ` Don Zickus
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