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From: Tejun Heo <tj@kernel.org>
To: Brian Norris <computersforpeace@gmail.com>
Cc: linux-ide@vger.kernel.org, Valdis.Kletnieks@vt.edu,
	"Rafael J. Wysocki" <rjw@sisk.pl>,
	Jeff Garzik <jgarzik@pobox.com>,
	Michael Leun <lkml20100708@newton.leun.net>,
	linux-kernel@vger.kernel.org, Jian Peng <jipeng2005@gmail.com>,
	Kevin Cernekee <cernekee@gmail.com>
Subject: Re: ahci_start_engine compliance with AHCI spec
Date: Wed, 13 Jul 2011 15:14:07 +0200	[thread overview]
Message-ID: <20110713131407.GN2872@htj.dyndns.org> (raw)
In-Reply-To: <CAN8TOE9CCSiS2koyx=UsZj=9KwaWZW5yDjUUqgJf2=qZU70k1w@mail.gmail.com>

Hello,

On Fri, Jul 08, 2011 at 04:01:17PM -0700, Brian Norris wrote:
> I am able to reproduce the regressions seen by Rafael and Michael on
> my Dell Latitude E6410 laptop, in case that's helpful.

Oh yes, it is.

> - ahci_init_one
> -- ata_host_activate
> --- ata_host_start
> ---- ahci_port_start
> ---- ahci_port_resume
> ----- ahci_start_port
> ------ ahci_power_up [1]
> ------ ahci_start_engine (DRQ or BSY *will* be active) [2]
> 
> and later
> 
> - scsi_error_handler
> -- ata_scsi_error
> --- ata_scsi_port_error_handler
> ---- ahci_error_handler
> ----- sata_pmp_error_handler
> ------ ata_eh_recover
> ------- ata_eh_reset
> -------- ata_do_reset
> --------- ahci_hardreset
> ---------- ahci_start_engine (DRQ, BSY cleared, link up)
> 
> I'm not sure if the "error_handler" and "hard reset" processes are
> intended for initialization...as I said I'm a little new!

That's how it's supposed to work.  EH is integral part of probing
sequence.

> I have a few other questions:
> 
> What operation could be putting devices in DRQ or BSY states during
> initialization but before ahci_start_engine?

Hmmm... I have no idea, maybe it has something to do with the first
D2H Reg FIS device sends after link gets reset during controller init?

> I bring up all of this because it seems that if I put some amount of
> "wait time" between [1] and [2] above, then my system transitions from
> DRQ to BSY and its link is connected (PxSSTS.DET == 0x3). I still
> don't know why the device is BSY, but at least it solves my problem...
> Perhaps I will try implementing the wait with ata_wait_register (or
> maybe ata_wait_ready + ata_phys_link_online) on the PxSSTS.DET flags
> and send a patch.

Hmmm... what happens if you don't comment out ahci_start_engine() call
from ahci_start_port()?

> Sorry if this e-mail is too complicated or disorganized. I've been
> racking my brain on this one for a few weeks now, and I've only come
> up with a few half answers and some more questions. Feel free to ask
> for more explanation, but don't worry if I don't respond immediately,
> as I am on vacation for all of next week. If I don't get to them
> before I leave, I will get to your replies when I return.

Is this the same IP block that Jian Peng was using?

Thanks.

-- 
tejun

  reply	other threads:[~2011-07-13 13:14 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-07-08 23:01 Brian Norris
2011-07-13 13:14 ` Tejun Heo [this message]
2011-07-18 18:40   ` Brian Norris
2011-07-21  8:49     ` Tejun Heo
2011-07-21 17:13       ` Brian Norris
2011-07-22  9:03         ` Tejun Heo
2011-07-22  9:41           ` [PATCH #upstream] ahci: start engine only during soft/hard resets Tejun Heo
2011-07-22 20:41             ` Brian Norris
2011-07-23 22:12             ` Jeff Garzik
2011-08-03  0:06           ` ahci_start_engine compliance with AHCI spec Brian Norris
2011-08-04  9:44             ` Tejun Heo

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