* How to access serial port that is set in BIOS as OS Controlled
@ 2011-07-28 5:43 Jeff Chua
2011-08-04 10:56 ` Andrey Panin
0 siblings, 1 reply; 10+ messages in thread
From: Jeff Chua @ 2011-07-28 5:43 UTC (permalink / raw)
To: lkml
I'm trying to access the serial port ttyS2 that is set in the BIOS as
"OS Controlled" without much success. If it's set it to "Always
Enabled", I can access the serial port.
This is on the Intermec CV60, and ttyS2 is the touchscreen port.
# setserial /dev/ttyS2
/dev/ttyS2, UART: 16550A, Port: 0x03e8, IRQ: 6
If I set the BIOS to "OS Controlled", I can't access the serial port
no matter what parameter I pass to the setserial. The factory default
is "OS Controlled", and Window XP can detect and access the port.
There will be hundreds of CV60 to get into the BIOS to set it one by
one. If there's a way to access the port in linux, it'll be great!
Thanks,
Jeff
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: How to access serial port that is set in BIOS as OS Controlled
2011-07-28 5:43 How to access serial port that is set in BIOS as OS Controlled Jeff Chua
@ 2011-08-04 10:56 ` Andrey Panin
2011-08-04 17:39 ` Bjorn Helgaas
0 siblings, 1 reply; 10+ messages in thread
From: Andrey Panin @ 2011-08-04 10:56 UTC (permalink / raw)
To: Jeff Chua; +Cc: lkml
On 209, 07 28, 2011 at 01:43:11PM +0800, Jeff Chua wrote:
> I'm trying to access the serial port ttyS2 that is set in the BIOS as
> "OS Controlled" without much success. If it's set it to "Always
> Enabled", I can access the serial port.
>
> This is on the Intermec CV60, and ttyS2 is the touchscreen port.
>
> # setserial /dev/ttyS2
> /dev/ttyS2, UART: 16550A, Port: 0x03e8, IRQ: 6
>
>
> If I set the BIOS to "OS Controlled", I can't access the serial port
> no matter what parameter I pass to the setserial. The factory default
> is "OS Controlled", and Window XP can detect and access the port.
> There will be hundreds of CV60 to get into the BIOS to set it one by
> one. If there's a way to access the port in linux, it'll be great!
Does lspnp show this port in "OS Controlled" mode ?
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: How to access serial port that is set in BIOS as OS Controlled
2011-08-04 10:56 ` Andrey Panin
@ 2011-08-04 17:39 ` Bjorn Helgaas
[not found] ` <CAAJw_ZvZEn0qVG3JVfEWFQbOSjVUCJhBwQ2Dw5KQyDx2kY4xbA@mail.gmail.com>
0 siblings, 1 reply; 10+ messages in thread
From: Bjorn Helgaas @ 2011-08-04 17:39 UTC (permalink / raw)
To: Jeff Chua, lkml
On Thu, Aug 4, 2011 at 4:56 AM, Andrey Panin <pazke@centrinvest.ru> wrote:
> On 209, 07 28, 2011 at 01:43:11PM +0800, Jeff Chua wrote:
>> I'm trying to access the serial port ttyS2 that is set in the BIOS as
>> "OS Controlled" without much success. If it's set it to "Always
>> Enabled", I can access the serial port.
>>
>> This is on the Intermec CV60, and ttyS2 is the touchscreen port.
>>
>> # setserial /dev/ttyS2
>> /dev/ttyS2, UART: 16550A, Port: 0x03e8, IRQ: 6
>>
>>
>> If I set the BIOS to "OS Controlled", I can't access the serial port
>> no matter what parameter I pass to the setserial. The factory default
>> is "OS Controlled", and Window XP can detect and access the port.
>> There will be hundreds of CV60 to get into the BIOS to set it one by
>> one. If there's a way to access the port in linux, it'll be great!
>
> Does lspnp show this port in "OS Controlled" mode ?
It would definitely be interesting to know what lspnp says, but I
suspect there might be even more to it.
Linux can find UARTs via PNP (via PNPACPI on modern boxes). But we
also poke blindly at the legacy I/O port addresses in
SERIAL_PORT_DFNS, which includes 0x3e8, so we should have found it
that way even if we didn't find it via PNP.
My guess is that in "OS Controlled" mode, the port is initially
powered off or disconnected, so we can't find it, and there's some
ACPI method that would turn it on. Windows might be enabling it
automatically.
Can you also collect the DSDT so we can investigate this possibility?
There are instructions here:
http://kernel.org/pub/linux/kernel/people/helgaas/debug . You might
want to open a bug report at http://bugzilla.kernel.org to have a
place to attach the DSDT and some dmesg logs. I would start by filing
it under "ACPI / Config-Other".
Bjorn
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: How to access serial port that is set in BIOS as OS Controlled
@ 2011-08-11 9:07 Jeff Chua
2011-08-11 21:49 ` Bjorn Helgaas
0 siblings, 1 reply; 10+ messages in thread
From: Jeff Chua @ 2011-08-11 9:07 UTC (permalink / raw)
To: Bjorn Helgaas; +Cc: Andrey Panin, lkml, Matthew Garrett
[-- Attachment #1: Type: TEXT/PLAIN, Size: 2208 bytes --]
On Thu, Aug 11, 2011 at 12:46 AM, Bjorn Helgaas <bhelgaas@google.com>
wrote:
> On Fri, Aug 5, 2011 at 7:02 PM, Jeff Chua <jeff.chua.linux@gmail.com>
wrote:
> Ping, just a reminder :)
> I'm pretty sure Linux only runs _SRS when we actually *change*
> something, which doesn't seem to follow the intent of the spec. So if
> we can get a little more evidence here, I think it'd be worth changing
> Linux to call _SRS for every device when it enumerates it.
Sorry, it too so long. Had to work on another project.
I did some test and it seems "auto" didn't enable the port. With "auto",
dmesg showed more info (io 0x3e8-0x3ef irq 6), but port still disabled.
After "activate", then the port can be used.
After "disabled", the port cannot be activated again.
I've attached the DSDT.dat.dsl. I've reconfigured the kernel with
CONFIG_PNP_DEBUG_MESSAGES=y, booting with "pnp.debug", but there were not
a lot of messages in dmesg. I've captured those below, and attached the
dmesg as well.
Thanks,
Jeff
# lspnp
00:00 PNP0a03 (unknown)
00:01 PNP0c02 (unknown)
00:02 PNP0c02 (unknown)
00:03 PNP0200 (unknown)
00:04 PNP0c04 (unknown)
00:05 PNP0b00 (unknown)
00:06 PNP0800 (unknown)
00:07 PNP0303 (unknown)
00:08 PNP0501 (unknown)
00:09 PNP0501 (unknown)
00:0a PNP4972 (unknown)
00:0b PNP0501 (unknown)
# cat /sys/bus/pnp/devices/00:0a/resources
state = disabled
# echo auto > /sys/bus/pnp/devices/00:0a/resources
# dmesg
pnp 00:0a: [io 0x03e8-0x03ef]
pnp 00:0a: [irq 6]
# cat /sys/bus/pnp/devices/00:0a/resources
state = disabled
io 0x3e8-0x3ef
irq 6
# setserial /dev/ttyS2 uart 16550a irq 6
ttyS2: LSR safety check engaged!
ttyS2: LSR safety check engaged!
# echo activate > /sys/bus/pnp/devices/00:0a/resources
# dmesg
pnp 00:0a: [io 0x03e8-0x03ef]
pnp 00:0a: [irq 6]
pnp 00:0a: activated
# cat /sys/bus/pnp/devices/00:0a/resources
state = active
io 0x3e8-0x3ef
irq 6
# echo disable > /sys/bus/pnp/devices/00:0a/resources
# dmesg
pnp 00:0a: disabled
# cat /sys/bus/pnp/devices/00:0a/resources
state = disabled
# echo activate > /sys/bus/pnp/devices/00:0a/resources
-bash: echo: write error: Device or resource busy
# dmesg
pnp 00:0a: unable to assign resources
Thanks,
Jeff
[-- Attachment #2: Type: TEXT/PLAIN, Size: 106435 bytes --]
/*
* Intel ACPI Component Architecture
* AML Disassembler version 20110623-32 [Aug 5 2011]
* Copyright (c) 2000 - 2011 Intel Corporation
*
* Disassembly of DSDT.dat.boot, Thu Aug 11 06:52:50 2011
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00002ABE (10942)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
* Checksum 0x01
* OEM ID "INTEL"
* OEM Table ID "SolanoM2"
* OEM Revision 0x06040000 (100925440)
* Compiler ID "MSFT"
* Compiler Version 0x0100000E (16777230)
*/
DefinitionBlock ("DSDT.dat.aml", "DSDT", 1, "INTEL", "SolanoM2", 0x06040000)
{
External (Z008)
External (\_SB_.OSTB)
External (\_SB_.SMIC)
External (\_SB_.BCMD)
External (\_SB_.INF_, IntObj)
OperationRegion (DBG, SystemIO, 0x80, 0x01)
Field (DBG, ByteAcc, NoLock, Preserve)
{
DEBG, 8
}
OperationRegion (REG, SystemIO, 0x66, 0x01)
Field (REG, ByteAcc, NoLock, Preserve)
{
PT66, 8
}
Scope (_PR)
{
Processor (CPU0, 0x00, 0x00001010, 0x06) {}
}
Name (\GPIC, 0x00)
Method (\_PIC, 1, NotSerialized)
{
Store (Arg0, GPIC)
}
Name (\DSEN, 0x01)
Name (\MDEV, 0x01)
Name (_S0, Package (0x02)
{
0x00,
0x00
})
Name (_S5, Package (0x02)
{
0x07,
0x07
})
Method (_PTS, 1, NotSerialized)
{
If (LOr (LEqual (Arg0, 0x05), LEqual (Arg0, 0x04)))
{
\_SB.PCI0.LPC0.SIO.OFFB ()
\_SB.PCI0.LPC0.SIO.WGP2 (0xFE, 0x01)
\_SB.PCI0.LPC0.SIO.Z000 ()
Sleep (0x07D0)
}
}
Method (_WAK, 1, NotSerialized)
{
Store ("WAK", Debug)
}
Scope (_GPE)
{
Method (_L00, 0, NotSerialized)
{
Store (\_SB.PCI0.LPC0.SIO.RTMP (), Local1)
If (LEqual (\_TZ.CZON, 0x02))
{
Store (DerefOf (Index (Local1, 0x00)), Local2)
Store (DerefOf (Index (Local1, 0x01)), Local3)
If (LNotEqual (Local3, 0x00))
{
Add (Local2, 0x01, Local2)
}
If (LGreater (Local2, 0x5D))
{
Store (0x01, \_TZ.CTMP)
}
}
Notify (\_TZ.TZ1, 0x80)
}
Method (_L0B, 0, NotSerialized)
{
Notify (\_SB.PCI0.HUB, 0x02)
}
}
Scope (_SB)
{
Device (PCI0)
{
Name (_HID, EisaId ("PNP0A03"))
Name (_BBN, 0x00)
Name (_ADR, 0x00)
OperationRegion (REGS, PCI_Config, 0x40, 0xC0)
Field (REGS, DWordAcc, NoLock, Preserve)
{
Offset (0x12),
DRP0, 4,
DRP1, 4,
Offset (0x14),
DRP2, 4,
Offset (0x18),
, 7,
HEN, 1,
PAM0, 8,
PAM1, 8,
PAM2, 8,
PAM3, 8,
PAM4, 8,
PAM5, 8,
PAM6, 8,
Offset (0x30),
, 6,
UMA, 2
}
Name (DMST, Package (0x10)
{
0x00,
0x20,
0x20,
0x30,
0x40,
0x40,
0x60,
0x80,
0x00,
0x80,
0x80,
0xC0,
0x0100,
0x0100,
0x0100,
0x0200
})
Name (RSRC, ResourceTemplate ()
{
WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
0x0000, // Granularity
0x0000, // Range Minimum
0x00FF, // Range Maximum
0x0000, // Translation Offset
0x0100, // Length
0x00,, )
IO (Decode16,
0x0CF8, // Range Minimum
0x0CF8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
0x0000, // Granularity
0x0000, // Range Minimum
0x0CF7, // Range Maximum
0x0000, // Translation Offset
0x0CF8, // Length
0x00,, , TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000A0000, // Range Minimum
0x000BFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00020000, // Length
0x00,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000C0000, // Range Minimum
0x000C3FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
0x00,, _Y01, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000C4000, // Range Minimum
0x000C7FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
0x00,, _Y02, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000C8000, // Range Minimum
0x000CBFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
0x00,, _Y03, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000CC000, // Range Minimum
0x000CFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
0x00,, _Y04, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000D0000, // Range Minimum
0x000D3FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
0x00,, _Y05, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000D4000, // Range Minimum
0x000D7FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
0x00,, _Y06, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000D8000, // Range Minimum
0x000DBFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
0x00,, _Y07, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000DC000, // Range Minimum
0x000DFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
0x00,, _Y08, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000E0000, // Range Minimum
0x000E3FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
0x00,, _Y09, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000E4000, // Range Minimum
0x000E7FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
0x00,, _Y0A, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000E8000, // Range Minimum
0x000EBFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
0x00,, _Y0B, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000EC000, // Range Minimum
0x000EFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
0x00,, _Y0C, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x00000000, // Range Minimum
0x00000000, // Range Maximum
0x00000000, // Translation Offset
0x00000000, // Length
0x00,, _Y00, AddressRangeMemory, TypeStatic)
WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
0x0000, // Granularity
0x0D00, // Range Minimum
0xFFFF, // Range Maximum
0x0000, // Translation Offset
0xF300, // Length
0x00,, , TypeStatic)
})
Method (_CRS, 0, Serialized)
{
Store (Zero, Local1)
CreateDWordField (RSRC, \_SB.PCI0._Y00._MIN, BTMN)
CreateDWordField (RSRC, \_SB.PCI0._Y00._MAX, BTMX)
CreateDWordField (RSRC, \_SB.PCI0._Y00._LEN, BTLN)
Store (DRP0, Local0)
Store (DRP1, Local1)
Store (DRP2, Local2)
Add (DerefOf (Index (DMST, Local0)), DerefOf (Index (DMST, Local1
)), Local0)
Add (DerefOf (Index (DMST, Local2)), Local0, Local0)
ShiftLeft (Local0, 0x14, Local0)
Store (Local0, BTMN)
Subtract (0xFEC00000, Local0, BTLN)
Subtract (Add (BTMN, BTLN), 0x01, BTMX)
CreateBitField (RSRC, \_SB.PCI0._Y01._RW, C0RW)
CreateDWordField (RSRC, \_SB.PCI0._Y01._MIN, C0MN)
CreateDWordField (RSRC, \_SB.PCI0._Y01._MAX, C0MX)
CreateDWordField (RSRC, \_SB.PCI0._Y01._LEN, C0LN)
Store (One, C0RW)
If (LEqual (And (PAM1, 0x03), 0x01))
{
Store (Zero, C0RW)
}
Store (Zero, C0LN)
If (LNot (And (PAM1, 0x03)))
{
Store (0x4000, C0LN)
}
CreateBitField (RSRC, \_SB.PCI0._Y02._RW, C4RW)
CreateDWordField (RSRC, \_SB.PCI0._Y02._MIN, C4MN)
CreateDWordField (RSRC, \_SB.PCI0._Y02._MAX, C4MX)
CreateDWordField (RSRC, \_SB.PCI0._Y02._LEN, C4LN)
Store (One, C4RW)
If (LEqual (And (PAM1, 0x30), 0x10))
{
Store (Zero, C4RW)
}
Store (Zero, C4LN)
If (LNot (And (PAM1, 0x30)))
{
Store (0x4000, C4LN)
}
CreateBitField (RSRC, \_SB.PCI0._Y03._RW, C8RW)
CreateDWordField (RSRC, \_SB.PCI0._Y03._MIN, C8MN)
CreateDWordField (RSRC, \_SB.PCI0._Y03._MAX, C8MX)
CreateDWordField (RSRC, \_SB.PCI0._Y03._LEN, C8LN)
Store (One, C8RW)
If (LEqual (And (PAM2, 0x03), 0x01))
{
Store (Zero, C8RW)
}
Store (Zero, C8LN)
If (LNot (And (PAM2, 0x03)))
{
Store (0x4000, C8LN)
}
CreateBitField (RSRC, \_SB.PCI0._Y04._RW, CCRW)
CreateDWordField (RSRC, \_SB.PCI0._Y04._MIN, CCMN)
CreateDWordField (RSRC, \_SB.PCI0._Y04._MAX, CCMX)
CreateDWordField (RSRC, \_SB.PCI0._Y04._LEN, CCLN)
Store (One, CCRW)
If (LEqual (And (PAM2, 0x30), 0x10))
{
Store (Zero, CCRW)
}
Store (Zero, CCLN)
If (LNot (And (PAM2, 0x30)))
{
Store (0x4000, CCLN)
}
CreateBitField (RSRC, \_SB.PCI0._Y05._RW, D0RW)
CreateDWordField (RSRC, \_SB.PCI0._Y05._MIN, D0MN)
CreateDWordField (RSRC, \_SB.PCI0._Y05._MAX, D0MX)
CreateDWordField (RSRC, \_SB.PCI0._Y05._LEN, D0LN)
Store (One, D0RW)
If (LEqual (And (PAM3, 0x03), 0x01))
{
Store (Zero, D0RW)
}
Store (Zero, D0LN)
If (LNot (And (PAM3, 0x03)))
{
Store (0x4000, D0LN)
}
CreateBitField (RSRC, \_SB.PCI0._Y06._RW, D4RW)
CreateDWordField (RSRC, \_SB.PCI0._Y06._MIN, D4MN)
CreateDWordField (RSRC, \_SB.PCI0._Y06._MAX, D4MX)
CreateDWordField (RSRC, \_SB.PCI0._Y06._LEN, D4LN)
Store (One, D4RW)
If (LEqual (And (PAM3, 0x30), 0x10))
{
Store (Zero, D4RW)
}
Store (Zero, D4LN)
If (LNot (And (PAM3, 0x30)))
{
Store (0x4000, D4LN)
}
CreateBitField (RSRC, \_SB.PCI0._Y07._RW, D8RW)
CreateDWordField (RSRC, \_SB.PCI0._Y07._MIN, D8MN)
CreateDWordField (RSRC, \_SB.PCI0._Y07._MAX, D8MX)
CreateDWordField (RSRC, \_SB.PCI0._Y07._LEN, D8LN)
Store (One, D8RW)
If (LEqual (And (PAM4, 0x03), 0x01))
{
Store (Zero, D8RW)
}
Store (Zero, D8LN)
If (LNot (And (PAM4, 0x03)))
{
Store (0x4000, D8LN)
}
CreateBitField (RSRC, \_SB.PCI0._Y08._RW, DCRW)
CreateDWordField (RSRC, \_SB.PCI0._Y08._MIN, DCMN)
CreateDWordField (RSRC, \_SB.PCI0._Y08._MAX, DCMX)
CreateDWordField (RSRC, \_SB.PCI0._Y08._LEN, DCLN)
Store (One, DCRW)
If (LEqual (And (PAM4, 0x30), 0x10))
{
Store (Zero, DCRW)
}
Store (Zero, DCLN)
If (LNot (And (PAM4, 0x30)))
{
Store (0x4000, DCLN)
}
CreateBitField (RSRC, \_SB.PCI0._Y09._RW, E0RW)
CreateDWordField (RSRC, \_SB.PCI0._Y09._MIN, E0MN)
CreateDWordField (RSRC, \_SB.PCI0._Y09._MAX, E0MX)
CreateDWordField (RSRC, \_SB.PCI0._Y09._LEN, E0LN)
Store (One, E0RW)
If (LEqual (And (PAM5, 0x03), 0x01))
{
Store (Zero, E0RW)
}
Store (Zero, E0LN)
If (LNot (And (PAM5, 0x03)))
{
Store (0x4000, E0LN)
}
CreateBitField (RSRC, \_SB.PCI0._Y0A._RW, E4RW)
CreateDWordField (RSRC, \_SB.PCI0._Y0A._MIN, E4MN)
CreateDWordField (RSRC, \_SB.PCI0._Y0A._MAX, E4MX)
CreateDWordField (RSRC, \_SB.PCI0._Y0A._LEN, E4LN)
Store (One, E4RW)
If (LEqual (And (PAM5, 0x30), 0x10))
{
Store (Zero, E4RW)
}
Store (Zero, E4LN)
If (LNot (And (PAM5, 0x30)))
{
Store (0x4000, E4LN)
}
CreateBitField (RSRC, \_SB.PCI0._Y0B._RW, E8RW)
CreateDWordField (RSRC, \_SB.PCI0._Y0B._MIN, E8MN)
CreateDWordField (RSRC, \_SB.PCI0._Y0B._MAX, E8MX)
CreateDWordField (RSRC, \_SB.PCI0._Y0B._LEN, E8LN)
Store (One, E8RW)
If (LEqual (And (PAM6, 0x03), 0x01))
{
Store (Zero, E8RW)
}
Store (Zero, E8LN)
If (LNot (And (PAM6, 0x03)))
{
Store (0x4000, E8LN)
}
CreateBitField (RSRC, \_SB.PCI0._Y0C._RW, ECRW)
CreateDWordField (RSRC, \_SB.PCI0._Y0C._MIN, ECMN)
CreateDWordField (RSRC, \_SB.PCI0._Y0C._MAX, ECMX)
CreateDWordField (RSRC, \_SB.PCI0._Y0C._LEN, ECLN)
Store (One, ECRW)
If (LEqual (And (PAM6, 0x30), 0x10))
{
Store (Zero, ECRW)
}
Store (Zero, ECLN)
If (LNot (And (PAM6, 0x30)))
{
Store (0x4000, ECLN)
}
Return (RSRC)
}
Device (LVID)
{
Name (_HID, EisaId ("PNP0C02"))
Name (RSRC, ResourceTemplate ()
{
Memory32Fixed (ReadOnly,
0x00000000, // Address Base
0x00000000, // Address Length
_Y0D)
})
Method (_CRS, 0, Serialized)
{
CreateDWordField (RSRC, \_SB.PCI0.LVID._Y0D._BAS, SBAS)
CreateDWordField (RSRC, \_SB.PCI0.LVID._Y0D._LEN, SLEN)
Store (DRP0, Local0)
Store (DRP1, Local1)
Add (DerefOf (Index (DMST, Local0)), DerefOf (Index (DMST, Local1
)), Local0)
ShiftLeft (Local0, 0x14, Local0)
If (HEN)
{
Subtract (Local0, 0x00100000, Local0)
}
If (LEqual (UMA, 0x02))
{
Subtract (Local0, 0x00100000, SBAS)
Store (0x00180000, SLEN)
}
If (LEqual (UMA, 0x03))
{
Subtract (Local0, 0x00100000, SBAS)
Store (0x00100000, SLEN)
}
Return (RSRC)
}
}
Name (_PRT, Package (0x06)
{
Package (0x04)
{
0x001FFFFF,
0x00,
\_SB.PCI0.LPC0.LNKA,
0x00
},
Package (0x04)
{
0x001FFFFF,
0x01,
\_SB.PCI0.LPC0.LNKB,
0x00
},
Package (0x04)
{
0x001FFFFF,
0x02,
\_SB.PCI0.LPC0.LNKH,
0x00
},
Package (0x04)
{
0x001FFFFF,
0x03,
\_SB.PCI0.LPC0.LNKD,
0x00
},
Package (0x04)
{
0x0001FFFF,
0x00,
\_SB.PCI0.LPC0.LNKA,
0x00
},
Package (0x04)
{
0x0002FFFF,
0x00,
\_SB.PCI0.LPC0.LNKA,
0x00
}
})
Device (LPC0)
{
Name (_ADR, 0x001F0000)
Method (DECD, 4, NotSerialized)
{
Store (Arg0, Debug)
}
OperationRegion (REGS, PCI_Config, 0x40, 0xC0)
Field (REGS, DWordAcc, NoLock, Preserve)
{
PMBA, 16,
Offset (0x18),
GPBA, 16,
Offset (0xB0),
, 5,
FUND, 2
}
Device (MBRD)
{
Name (_HID, EisaId ("PNP0C02"))
Name (_UID, 0x1F)
Name (RSRC, ResourceTemplate ()
{
IO (Decode16,
0x0010, // Range Minimum
0x0010, // Range Maximum
0x01, // Alignment
0x10, // Length
)
IO (Decode16,
0x0024, // Range Minimum
0x0024, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0028, // Range Minimum
0x0028, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x002C, // Range Minimum
0x002C, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x002E, // Range Minimum
0x002E, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0030, // Range Minimum
0x0030, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0034, // Range Minimum
0x0034, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0038, // Range Minimum
0x0038, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x003C, // Range Minimum
0x003C, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x004E, // Range Minimum
0x004E, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0050, // Range Minimum
0x0050, // Range Maximum
0x01, // Alignment
0x04, // Length
)
IO (Decode16,
0x0072, // Range Minimum
0x0072, // Range Maximum
0x01, // Alignment
0x06, // Length
)
IO (Decode16,
0x0080, // Range Minimum
0x0080, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0090, // Range Minimum
0x0090, // Range Maximum
0x01, // Alignment
0x10, // Length
)
IO (Decode16,
0x00A4, // Range Minimum
0x00A4, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00A8, // Range Minimum
0x00A8, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00AC, // Range Minimum
0x00AC, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00B0, // Range Minimum
0x00B0, // Range Maximum
0x01, // Alignment
0x06, // Length
)
IO (Decode16,
0x00B8, // Range Minimum
0x00B8, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00BC, // Range Minimum
0x00BC, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0200, // Range Minimum
0x0200, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IO (Decode16,
0x0290, // Range Minimum
0x0290, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IO (Decode16,
0x0330, // Range Minimum
0x0330, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x04D0, // Range Minimum
0x04D0, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x1000, // Range Minimum
0x1000, // Range Maximum
0x01, // Alignment
0x80, // Length
_Y0E)
IO (Decode16,
0x1180, // Range Minimum
0x1180, // Range Maximum
0x01, // Alignment
0x40, // Length
_Y0F)
Memory32Fixed (ReadOnly,
0xFF800000, // Address Base
0x00800000, // Address Length
)
})
Method (_CRS, 0, NotSerialized)
{
CreateWordField (RSRC, \_SB.PCI0.LPC0.MBRD._Y0E._MIN, PMMN)
CreateWordField (RSRC, \_SB.PCI0.LPC0.MBRD._Y0E._MAX, PMMX)
And (^^PMBA, 0xFF80, PMMN)
Store (PMMN, PMMX)
CreateWordField (RSRC, \_SB.PCI0.LPC0.MBRD._Y0F._MIN, GPMN)
CreateWordField (RSRC, \_SB.PCI0.LPC0.MBRD._Y0F._MAX, GPMX)
And (^^GPBA, 0xFF80, GPMN)
Store (GPMN, GPMX)
Return (RSRC)
}
}
Device (DMAC)
{
Name (_HID, EisaId ("PNP0200"))
Name (_CRS, ResourceTemplate ()
{
IO (Decode16,
0x0000, // Range Minimum
0x0000, // Range Maximum
0x01, // Alignment
0x10, // Length
)
IO (Decode16,
0x0081, // Range Minimum
0x0081, // Range Maximum
0x01, // Alignment
0x0F, // Length
)
IO (Decode16,
0x00C0, // Range Minimum
0x00C0, // Range Maximum
0x01, // Alignment
0x20, // Length
)
DMA (Compatibility, NotBusMaster, Transfer16, )
{4}
})
}
Device (MATH)
{
Name (_HID, EisaId ("PNP0C04"))
Name (_CRS, ResourceTemplate ()
{
IO (Decode16,
0x00F0, // Range Minimum
0x00F0, // Range Maximum
0x01, // Alignment
0x0F, // Length
)
IRQ (Edge, ActiveHigh, Exclusive, )
{13}
})
}
Device (PIC)
{
Name (_HID, EisaId ("PNP0000"))
Name (_CRS, ResourceTemplate ()
{
IO (Decode16,
0x0020, // Range Minimum
0x0020, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00A0, // Range Minimum
0x00A0, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IRQ (Edge, ActiveHigh, Exclusive, )
{2}
})
}
Device (RTC)
{
Name (_HID, EisaId ("PNP0B00"))
Name (_CRS, ResourceTemplate ()
{
IO (Decode16,
0x0070, // Range Minimum
0x0070, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IRQ (Edge, ActiveHigh, Exclusive, )
{8}
})
}
Device (SPKR)
{
Name (_HID, EisaId ("PNP0800"))
Name (_CRS, ResourceTemplate ()
{
IO (Decode16,
0x0061, // Range Minimum
0x0061, // Range Maximum
0x01, // Alignment
0x01, // Length
)
})
}
Device (TIME)
{
Name (_HID, EisaId ("PNP0100"))
Name (_CRS, ResourceTemplate ()
{
IO (Decode16,
0x0040, // Range Minimum
0x0040, // Range Maximum
0x01, // Alignment
0x04, // Length
)
IRQ (Edge, ActiveHigh, Exclusive, )
{0}
})
}
Device (KBC0)
{
Name (_HID, EisaId ("PNP0303"))
Name (_CRS, ResourceTemplate ()
{
IO (Decode16,
0x0060, // Range Minimum
0x0060, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0064, // Range Minimum
0x0064, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IRQ (Edge, ActiveHigh, Exclusive, )
{1}
})
}
OperationRegion (PIRX, PCI_Config, 0x60, 0x04)
Field (PIRX, DWordAcc, NoLock, Preserve)
{
AccessAs (ByteAcc, 0x00),
PIRA, 8,
PIRB, 8,
PIRC, 8,
PIRD, 8
}
OperationRegion (PIRY, PCI_Config, 0x68, 0x04)
Field (PIRY, DWordAcc, NoLock, Preserve)
{
AccessAs (ByteAcc, 0x00),
PIRE, 8,
PIRF, 8,
PIRG, 8,
PIRH, 8
}
Device (LNKA)
{
Name (_HID, EisaId ("PNP0C0F"))
Name (_UID, 0x01)
Name (_PRS, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{5}
})
Name (RSRC, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, _Y10)
{}
})
Method (_DIS, 0, NotSerialized)
{
Or (PIRA, 0x80, PIRA)
}
Method (_CRS, 0, NotSerialized)
{
CreateWordField (RSRC, \_SB.PCI0.LPC0.LNKA._Y10._INT, IRQ0)
And (PIRA, 0x0F, Local0)
ShiftLeft (0x01, Local0, IRQ0)
Store (RSRC, Debug)
Return (RSRC)
}
Method (_SRS, 1, NotSerialized)
{
CreateWordField (Arg0, 0x01, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Or (Local0, And (PIRA, 0x70), PIRA)
}
Method (_STA, 0, NotSerialized)
{
If (And (PIRA, 0x80))
{
Return (0x09)
}
Return (0x0B)
}
}
Device (LNKB)
{
Name (_HID, EisaId ("PNP0C0F"))
Name (_UID, 0x02)
Name (_PRS, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{5}
})
Name (RSRC, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, _Y11)
{}
})
Method (_DIS, 0, NotSerialized)
{
Or (PIRB, 0x80, PIRB)
}
Method (_CRS, 0, NotSerialized)
{
CreateWordField (RSRC, \_SB.PCI0.LPC0.LNKB._Y11._INT, IRQ0)
And (PIRB, 0x0F, Local0)
ShiftLeft (0x01, Local0, IRQ0)
Return (RSRC)
}
Method (_SRS, 1, NotSerialized)
{
CreateWordField (Arg0, 0x01, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Or (Local0, And (PIRB, 0x70), PIRB)
}
Method (_STA, 0, NotSerialized)
{
If (And (PIRB, 0x80))
{
Return (0x09)
}
Return (0x0B)
}
}
Device (LNKC)
{
Name (_HID, EisaId ("PNP0C0F"))
Name (_UID, 0x03)
Name (_PRS, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{5}
})
Name (RSRC, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, _Y12)
{}
})
Method (_DIS, 0, NotSerialized)
{
Or (PIRC, 0x80, PIRC)
}
Method (_CRS, 0, NotSerialized)
{
CreateWordField (RSRC, \_SB.PCI0.LPC0.LNKC._Y12._INT, IRQ0)
And (PIRC, 0x0F, Local0)
ShiftLeft (0x01, Local0, IRQ0)
Return (RSRC)
}
Method (_SRS, 1, NotSerialized)
{
CreateWordField (Arg0, 0x01, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Or (Local0, And (PIRC, 0x70), PIRC)
}
Method (_STA, 0, NotSerialized)
{
If (And (PIRC, 0x80))
{
Return (0x09)
}
Return (0x0B)
}
}
Device (LNKD)
{
Name (_HID, EisaId ("PNP0C0F"))
Name (_UID, 0x04)
Name (_PRS, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{5}
})
Name (RSRC, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, _Y13)
{}
})
Method (_DIS, 0, NotSerialized)
{
Or (PIRD, 0x80, PIRD)
}
Method (_CRS, 0, NotSerialized)
{
CreateWordField (RSRC, \_SB.PCI0.LPC0.LNKD._Y13._INT, IRQ0)
And (PIRD, 0x0F, Local0)
ShiftLeft (0x01, Local0, IRQ0)
Return (RSRC)
}
Method (_SRS, 1, NotSerialized)
{
CreateWordField (Arg0, 0x01, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Or (Local0, And (PIRD, 0x70), PIRD)
}
Method (_STA, 0, NotSerialized)
{
If (And (PIRD, 0x80))
{
Return (0x09)
}
Return (0x0B)
}
}
Device (LNKE)
{
Name (_HID, EisaId ("PNP0C0F"))
Name (_UID, 0x05)
Name (_PRS, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{5}
})
Name (RSRC, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, _Y14)
{}
})
Method (_DIS, 0, NotSerialized)
{
Or (PIRE, 0x80, PIRE)
}
Method (_CRS, 0, NotSerialized)
{
CreateWordField (RSRC, \_SB.PCI0.LPC0.LNKE._Y14._INT, IRQ0)
And (PIRE, 0x0F, Local0)
ShiftLeft (0x01, Local0, IRQ0)
Return (RSRC)
}
Method (_SRS, 1, NotSerialized)
{
CreateWordField (Arg0, 0x01, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Or (Local0, And (PIRE, 0x70), PIRE)
}
Method (_STA, 0, NotSerialized)
{
If (And (PIRE, 0x80))
{
Return (0x09)
}
Return (0x0B)
}
}
Device (LNKF)
{
Name (_HID, EisaId ("PNP0C0F"))
Name (_UID, 0x06)
Name (_PRS, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{5}
})
Name (RSRC, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, _Y15)
{}
})
Method (_DIS, 0, NotSerialized)
{
Or (PIRF, 0x80, PIRF)
}
Method (_CRS, 0, NotSerialized)
{
CreateWordField (RSRC, \_SB.PCI0.LPC0.LNKF._Y15._INT, IRQ0)
And (PIRF, 0x0F, Local0)
ShiftLeft (0x01, Local0, IRQ0)
Return (RSRC)
}
Method (_SRS, 1, NotSerialized)
{
CreateWordField (Arg0, 0x01, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Or (Local0, And (PIRF, 0x70), PIRF)
}
Method (_STA, 0, NotSerialized)
{
If (And (PIRF, 0x80))
{
Return (0x09)
}
Return (0x0B)
}
}
Device (LNKG)
{
Name (_HID, EisaId ("PNP0C0F"))
Name (_UID, 0x07)
Name (_PRS, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{5}
})
Name (RSRC, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, _Y16)
{}
})
Method (_DIS, 0, NotSerialized)
{
Or (PIRG, 0x80, PIRG)
}
Method (_CRS, 0, NotSerialized)
{
CreateWordField (RSRC, \_SB.PCI0.LPC0.LNKG._Y16._INT, IRQ0)
And (PIRG, 0x0F, Local0)
ShiftLeft (0x01, Local0, IRQ0)
Return (RSRC)
}
Method (_SRS, 1, NotSerialized)
{
CreateWordField (Arg0, 0x01, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Or (Local0, And (PIRG, 0x70), PIRG)
}
Method (_STA, 0, NotSerialized)
{
If (And (PIRG, 0x80))
{
Return (0x09)
}
Return (0x0B)
}
}
Device (LNKH)
{
Name (_HID, EisaId ("PNP0C0F"))
Name (_UID, 0x08)
Name (_PRS, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{7}
})
Name (RSRC, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, _Y17)
{}
})
Method (_DIS, 0, NotSerialized)
{
Or (PIRH, 0x80, PIRH)
}
Method (_CRS, 0, NotSerialized)
{
CreateWordField (RSRC, \_SB.PCI0.LPC0.LNKH._Y17._INT, IRQ0)
And (PIRH, 0x0F, Local0)
ShiftLeft (0x01, Local0, IRQ0)
Return (RSRC)
}
Method (_SRS, 1, NotSerialized)
{
CreateWordField (Arg0, 0x01, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Or (Local0, And (PIRH, 0x70), PIRH)
}
Method (_STA, 0, NotSerialized)
{
If (And (PIRH, 0x80))
{
Return (0x09)
}
Return (0x0B)
}
}
OperationRegion (GPOX, SystemIO, 0x1180, 0x30)
Field (GPOX, DWordAcc, Lock, Preserve)
{
Offset (0x07),
, 3,
IO27, 1,
Offset (0x0F),
, 3,
LV27, 1,
Offset (0x1B),
, 3,
BL27, 1
}
OperationRegion (PMIO, SystemIO, 0x1000, 0x30)
Field (PMIO, WordAcc, Lock, Preserve)
{
AccessAs (DWordAcc, 0x00),
Offset (0x29),
, 3,
Z001, 1,
Offset (0x2B),
, 3,
Z002, 1,
Offset (0x2C),
, 6,
GPES, 1,
Offset (0x2E),
, 6,
GPEE, 1
}
Device (SIO)
{
Name (_HID, EisaId ("PNP0A05"))
Name (_UID, 0x01)
Mutex (W627, 0x00)
OperationRegion (SIBP, SystemIO, 0x2E, 0x02)
Field (SIBP, ByteAcc, NoLock, Preserve)
{
BPIO, 8
}
OperationRegion (SIIO, SystemIO, 0x2E, 0x02)
Field (SIIO, ByteAcc, NoLock, Preserve)
{
INDX, 8,
DATA, 8
}
OperationRegion (SIB2, SystemIO, 0x4E, 0x02)
Field (SIB2, ByteAcc, NoLock, Preserve)
{
BPI2, 8
}
OperationRegion (SII2, SystemIO, 0x4E, 0x02)
Field (SII2, ByteAcc, NoLock, Preserve)
{
IND2, 8,
DAT2, 8
}
OperationRegion (HMIO, SystemIO, 0x0295, 0x02)
Field (HMIO, ByteAcc, NoLock, Preserve)
{
HWMX, 8,
HWMD, 8
}
IndexField (INDX, DATA, ByteAcc, NoLock, Preserve)
{
Offset (0x07),
LDN, 8,
Offset (0x22),
POW, 8,
Offset (0x30),
ACT, 1,
Offset (0x60),
IOBH, 8,
IOBL, 8,
IO2H, 8,
IO2L, 8,
Offset (0x70),
INT, 4,
Offset (0x74),
DMAS, 3,
Offset (0xE0),
Z003, 8,
Offset (0xE4),
Z004, 8,
Offset (0xF1),
Z005, 8
}
IndexField (IND2, DAT2, ByteAcc, NoLock, Preserve)
{
Offset (0x07),
LDN2, 8,
Offset (0x22),
POW2, 8,
Offset (0x30),
ACT2, 1,
Offset (0x60),
IOH2, 8,
IOL2, 8,
Offset (0x70),
INT2, 4
}
IndexField (HWMX, HWMD, ByteAcc, NoLock, Preserve)
{
Offset (0x4E),
BSEL, 8,
Offset (0x50),
TMPH, 8,
TMPL, 8,
S2CG, 8,
HSTP, 8,
Offset (0x55),
OVTP, 8,
Offset (0x59),
TSNR, 8,
PWM1, 8,
Offset (0x5D),
VMON, 8
}
Name (READ, 0x0B9C)
Name (RPOR, 0x0B9C)
Method (_INI, 0, NotSerialized)
{
Store ("..............Init Temperature Sensor.......", Debug)
Acquire (W627, 0x5000)
Store (0x01, BSEL)
Store (0x02, S2CG)
Store (0x01, BSEL)
Store (0x55, OVTP)
Store (0x01, BSEL)
Store (0x4B, HSTP)
Release (W627)
}
Method (OFFB, 0, NotSerialized)
{
Acquire (W627, 0x5000)
Store (0x00, BSEL)
Store (0xFF, PWM1)
Release (W627)
}
Method (WGP2, 2, NotSerialized)
{
Acquire (W627, 0x1388)
CFG (0x08)
Store (Z005, Local0)
And (Local0, Arg0, Local1)
Or (Local1, Arg1, Local2)
Store (Local2, Z005)
XCFG ()
Release (W627)
Return (0x00)
}
Method (RTMP, 0, NotSerialized)
{
Store (Buffer (0x02) {}, Local7)
CreateByteField (Local7, 0x00, TMP1)
CreateByteField (Local7, 0x01, TMP2)
Acquire (W627, 0x5000)
Store (0x01, BSEL)
Store (TMPH, TMP1)
Store (0x01, BSEL)
Store (TMPL, TMP2)
Release (W627)
Return (Local7)
}
Method (STMP, 1, NotSerialized)
{
Store (0x01, BSEL)
Store (Arg0, OVTP)
Store (0x01, BSEL)
Store (Arg0, HSTP)
}
Method (Z000, 0, NotSerialized)
{
Acquire (W627, 0x1388)
CFG (0x09)
Store (0xF1, INDX)
Store (0xFF, DATA)
XCFG ()
Release (W627)
}
Method (CFG, 1, NotSerialized)
{
Store (0x87, BPIO)
Store (0x87, BPIO)
Store (0x20, INDX)
Store (Arg0, LDN)
}
Method (XCFG, 0, NotSerialized)
{
Store (0xAA, BPIO)
}
Method (STA, 1, NotSerialized)
{
Acquire (W627, 0x5000)
CFG (Arg0)
Store (0x00, Local1)
If (ACT)
{
Store (0x0F, Local1)
}
Else
{
Store (0x0D, Local1)
}
XCFG ()
Release (W627)
Return (Local1)
}
Method (DIS, 1, NotSerialized)
{
Acquire (W627, 0x1388)
CFG (Arg0)
Store (0x00, ACT)
XCFG ()
Release (W627)
Return (0x00)
}
Method (PS0, 1, NotSerialized)
{
Acquire (W627, 0x1388)
CFG (Arg0)
Store (0x01, ACT)
XCFG ()
Release (W627)
Return (0x00)
}
Method (PS3, 1, NotSerialized)
{
Acquire (W627, 0x1388)
CFG (Arg0)
Store (0x00, ACT)
XCFG ()
Release (W627)
Return (0x00)
}
Method (CFG2, 1, NotSerialized)
{
Store (0x87, BPI2)
Store (0x87, BPI2)
Store (Arg0, LDN2)
}
Method (XCF2, 0, NotSerialized)
{
Store (0xAA, BPI2)
}
Method (STA2, 1, NotSerialized)
{
Acquire (W627, 0x5000)
CFG2 (Arg0)
Store (0x00, Local1)
If (ACT2)
{
Store (0x0F, Local1)
}
Else
{
Store (0x0D, Local1)
}
XCF2 ()
Release (W627)
Return (Local1)
}
Method (DIS2, 1, NotSerialized)
{
Acquire (W627, 0x1388)
CFG2 (Arg0)
Store (0x00, ACT2)
XCF2 ()
Release (W627)
Return (0x00)
}
Method (PS02, 1, NotSerialized)
{
Acquire (W627, 0x1388)
CFG2 (Arg0)
Store (0x01, ACT2)
XCF2 ()
Release (W627)
Return (0x00)
}
Method (PS32, 1, NotSerialized)
{
Acquire (W627, 0x1388)
CFG2 (Arg0)
Store (0x00, ACT2)
XCF2 ()
Release (W627)
Return (0x00)
}
Device (COM1)
{
Name (_HID, EisaId ("PNP0501"))
Name (_UID, 0x02)
Name (_DDN, "COM1")
Method (_STA, 0, NotSerialized)
{
Store (STA (0x02), Local1)
Return (Local1)
}
Method (_DIS, 0, NotSerialized)
{
DIS (0x02)
}
Method (_CRS, 0, NotSerialized)
{
Name (RSRC, ResourceTemplate ()
{
IO (Decode16,
0x0000, // Range Minimum
0x0000, // Range Maximum
0x08, // Alignment
0x08, // Length
_Y18)
IRQNoFlags (_Y19)
{}
})
CreateByteField (RSRC, \_SB.PCI0.LPC0.SIO.COM1._CRS._Y18._MIN, IO1)
CreateByteField (RSRC, 0x03, IO2)
CreateWordField (RSRC, \_SB.PCI0.LPC0.SIO.COM1._CRS._Y19._INT, IRQV)
Acquire (W627, 0x1388)
CFG (0x02)
If (ACT)
{
Store (IOBL, IO1)
Store (IOBH, IO2)
Store (0x01, Local0)
ShiftLeft (Local0, INT, IRQV)
}
XCFG ()
Release (W627)
Return (RSRC)
}
Name (_PRS, ResourceTemplate ()
{
StartDependentFnNoPri ()
{
IO (Decode16,
0x03F8, // Range Minimum
0x03F8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQ (Edge, ActiveHigh, Exclusive, )
{4}
}
EndDependentFn ()
})
Method (_SRS, 1, NotSerialized)
{
CreateByteField (Arg0, 0x02, IO1)
CreateByteField (Arg0, 0x03, IO2)
CreateWordField (Arg0, 0x09, IRQV)
Acquire (W627, 0x1388)
CFG (0x02)
Store (IO1, IOBL)
Store (IO2, IOBH)
FindSetRightBit (IRQV, Local0)
Subtract (Local0, 0x01, INT)
Store (0x01, ACT)
XCFG ()
Release (W627)
}
Method (_PS0, 0, NotSerialized)
{
PS0 (0x02)
}
Method (_PS3, 0, NotSerialized)
{
PS3 (0x02)
}
}
Device (COM2)
{
Name (_HID, EisaId ("PNP0501"))
Name (_UID, 0x01)
Name (_DDN, "COM2")
Method (_STA, 0, NotSerialized)
{
Store (STA (0x03), Local1)
Return (Local1)
}
Method (_DIS, 0, NotSerialized)
{
DIS (0x03)
}
Method (_CRS, 0, NotSerialized)
{
Name (RSRC, ResourceTemplate ()
{
IO (Decode16,
0x0000, // Range Minimum
0x0000, // Range Maximum
0x08, // Alignment
0x08, // Length
_Y1A)
IRQNoFlags (_Y1B)
{}
})
CreateByteField (RSRC, \_SB.PCI0.LPC0.SIO.COM2._CRS._Y1A._MIN, IO1)
CreateByteField (RSRC, 0x03, IO2)
CreateWordField (RSRC, \_SB.PCI0.LPC0.SIO.COM2._CRS._Y1B._INT, IRQV)
Acquire (W627, 0x1388)
CFG (0x03)
If (ACT)
{
Store (IOBL, IO1)
Store (IOBH, IO2)
Store (0x01, Local0)
ShiftLeft (Local0, INT, IRQV)
}
XCFG ()
Release (W627)
Return (RSRC)
}
Name (_PRS, ResourceTemplate ()
{
StartDependentFnNoPri ()
{
IO (Decode16,
0x02F8, // Range Minimum
0x02F8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQ (Edge, ActiveHigh, Exclusive, )
{3}
}
EndDependentFn ()
})
Method (_SRS, 1, NotSerialized)
{
CreateByteField (Arg0, 0x02, IO1)
CreateByteField (Arg0, 0x03, IO2)
CreateWordField (Arg0, 0x09, IRQV)
Acquire (W627, 0x1388)
CFG (0x03)
Store (IO1, IOBL)
Store (IO2, IOBH)
FindSetRightBit (IRQV, Local0)
Subtract (Local0, 0x01, INT)
Store (0x01, ACT)
XCFG ()
Release (W627)
}
Method (_PS0, 0, NotSerialized)
{
PS0 (0x03)
}
Method (_PS3, 0, NotSerialized)
{
PS3 (0x03)
}
}
Device (COM3)
{
Name (_HID, EisaId ("PNP4972"))
Method (_STA, 0, NotSerialized)
{
Store (STA2 (0x02), Local1)
Return (Local1)
}
Method (_DIS, 0, NotSerialized)
{
DIS2 (0x02)
}
Method (_CRS, 0, NotSerialized)
{
Name (RSRC, ResourceTemplate ()
{
IO (Decode16,
0x0000, // Range Minimum
0x0000, // Range Maximum
0x08, // Alignment
0x08, // Length
_Y1C)
IRQNoFlags (_Y1D)
{}
})
CreateByteField (RSRC, \_SB.PCI0.LPC0.SIO.COM3._CRS._Y1C._MIN, IO1)
CreateByteField (RSRC, 0x03, IO2)
CreateWordField (RSRC, \_SB.PCI0.LPC0.SIO.COM3._CRS._Y1D._INT, IRQV)
Acquire (W627, 0x1388)
CFG2 (0x02)
If (ACT2)
{
Store (IOL2, IO1)
Store (IOH2, IO2)
Store (0x01, Local0)
ShiftLeft (Local0, INT2, IRQV)
}
XCF2 ()
Release (W627)
Return (RSRC)
}
Name (_PRS, ResourceTemplate ()
{
StartDependentFnNoPri ()
{
IO (Decode16,
0x03E8, // Range Minimum
0x03E8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQ (Edge, ActiveHigh, Exclusive, )
{6}
}
EndDependentFn ()
})
Method (_SRS, 1, NotSerialized)
{
CreateByteField (Arg0, 0x02, IO1)
CreateByteField (Arg0, 0x03, IO2)
CreateWordField (Arg0, 0x09, IRQV)
Acquire (W627, 0x1388)
CFG2 (0x02)
Store (IO1, IOL2)
Store (IO2, IOH2)
FindSetRightBit (IRQV, Local0)
Subtract (Local0, 0x01, INT2)
Store (0x01, ACT2)
XCF2 ()
Release (W627)
}
}
Device (COM4)
{
Name (_HID, EisaId ("PNP0501"))
Name (_DDN, "COM4")
Name (_UID, 0x00)
Method (_STA, 0, NotSerialized)
{
Store (STA2 (0x03), Local1)
Return (Local1)
}
Method (_DIS, 0, NotSerialized)
{
DIS2 (0x03)
}
Method (_CRS, 0, NotSerialized)
{
Name (RSRC, ResourceTemplate ()
{
IO (Decode16,
0x0000, // Range Minimum
0x0000, // Range Maximum
0x08, // Alignment
0x08, // Length
_Y1E)
IRQNoFlags (_Y1F)
{}
})
CreateByteField (RSRC, \_SB.PCI0.LPC0.SIO.COM4._CRS._Y1E._MIN, IO1)
CreateByteField (RSRC, 0x03, IO2)
CreateWordField (RSRC, \_SB.PCI0.LPC0.SIO.COM4._CRS._Y1F._INT, IRQV)
Acquire (W627, 0x1388)
CFG2 (0x03)
If (ACT2)
{
Store (IOL2, IO1)
Store (IOH2, IO2)
Store (0x01, Local0)
ShiftLeft (Local0, INT2, IRQV)
}
XCF2 ()
Release (W627)
Return (RSRC)
}
Name (_PRS, ResourceTemplate ()
{
StartDependentFnNoPri ()
{
IO (Decode16,
0x02E8, // Range Minimum
0x02E8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQ (Edge, ActiveHigh, Exclusive, )
{12}
}
EndDependentFn ()
})
Method (_SRS, 1, NotSerialized)
{
CreateByteField (Arg0, 0x02, IO1)
CreateByteField (Arg0, 0x03, IO2)
CreateWordField (Arg0, 0x09, IRQV)
Acquire (W627, 0x1388)
CFG2 (0x03)
Store (IO1, IOL2)
Store (IO2, IOH2)
FindSetRightBit (IRQV, Local0)
Subtract (Local0, 0x01, INT2)
Store (0x01, ACT2)
XCF2 ()
Release (W627)
}
Method (_PS0, 0, NotSerialized)
{
PS02 (0x03)
}
Method (_PS3, 0, NotSerialized)
{
PS32 (0x03)
}
}
}
}
Device (HUB)
{
Name (_ADR, 0x001E0000)
Name (_PRT, Package (0x04)
{
Package (0x04)
{
0x0002FFFF,
0x00,
\_SB.PCI0.LPC0.LNKC,
0x00
},
Package (0x04)
{
0xFFFF,
0x00,
\_SB.PCI0.LPC0.LNKA,
0x00
},
Package (0x04)
{
0x0001FFFF,
0x00,
\_SB.PCI0.LPC0.LNKB,
0x00
},
Package (0x04)
{
0x0008FFFF,
0x00,
\_SB.PCI0.LPC0.LNKE,
0x00
}
})
Device (CDB0)
{
Name (_ADR, 0x00010000)
OperationRegion (CCRD, PCI_Config, 0x00, 0x48)
Field (CCRD, DWordAcc, NoLock, Preserve)
{
Offset (0x3C),
CD3C, 32,
Offset (0x44),
CD44, 32
}
Method (_INI, 0, NotSerialized)
{
Or (CD3C, 0xFF, CD3C)
And (CD44, 0xFFFF0000, CD44)
}
Name (_PRW, Package (0x02)
{
0x0B,
0x01
})
}
Device (NIC0)
{
Name (_ADR, 0x00080000)
OperationRegion (NICI, PCI_Config, 0xE0, 0x04)
Field (NICI, AnyAcc, NoLock, Preserve)
{
PMCS, 8
}
PowerResource (NICP, 0x00, 0x0000)
{
Method (_STA, 0, NotSerialized)
{
Store (PMCS, Local0)
And (Local0, 0x03, Local1)
If (LEqual (Local1, 0x00))
{
Store (0x01, Local1)
}
Else
{
Store (0x00, Local1)
}
Return (Local1)
}
Method (_ON, 0, NotSerialized)
{
Store (PMCS, Local0)
And (Local0, 0xF0, Local1)
Store (Local1, PMCS)
}
Method (_OFF, 0, NotSerialized)
{
Store (PMCS, Local0)
And (Local0, 0xF0, Local1)
Or (Local1, 0x03, Local1)
Store (Local1, PMCS)
}
}
Name (_PR0, Package (0x01)
{
NICP
})
Name (_S4D, 0x03)
}
Name (_PRW, Package (0x02)
{
0x0B,
0x01
})
}
Device (IDEC)
{
Name (_ADR, 0x001F0001)
OperationRegion (IDEC, PCI_Config, 0x40, 0x18)
Field (IDEC, DWordAcc, NoLock, Preserve)
{
PRIT, 16,
SECT, 16,
PSIT, 4,
SSIT, 4,
Offset (0x08),
SDMA, 4,
Offset (0x0A),
SDT0, 2,
, 2,
SDT1, 2,
Offset (0x0B),
SDT2, 2,
, 2,
SDT3, 2,
Offset (0x14),
ICR0, 4,
ICR1, 4,
ICR2, 4,
ICR3, 4,
ICR4, 4,
ICR5, 4
}
Device (PRID)
{
Name (_ADR, 0x00)
Method (_GTM, 0, NotSerialized)
{
Name (PBUF, Buffer (0x14)
{
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 0010 */ 0x00, 0x00, 0x00, 0x00
})
CreateDWordField (PBUF, 0x00, PIO0)
CreateDWordField (PBUF, 0x04, DMA0)
CreateDWordField (PBUF, 0x08, PIO1)
CreateDWordField (PBUF, 0x0C, DMA1)
CreateDWordField (PBUF, 0x10, FLAG)
Store (GETP (PRIT), PIO0)
Store (GETD (And (SDMA, 0x01), And (ICR3, 0x01),
And (ICR0, 0x01), SDT0), DMA0)
If (LEqual (DMA0, 0xFFFFFFFF))
{
Store (PIO0, DMA0)
}
If (And (PRIT, 0x4000))
{
If (LEqual (And (PRIT, 0x90), 0x80))
{
Store (0x0384, PIO1)
}
Else
{
Store (GETT (PSIT), PIO1)
}
}
Else
{
Store (0xFFFFFFFF, PIO1)
}
Store (GETD (And (SDMA, 0x02), And (ICR3, 0x02),
And (ICR0, 0x02), SDT1), DMA1)
If (LEqual (DMA1, 0xFFFFFFFF))
{
Store (PIO1, DMA1)
}
Store (GETF (And (SDMA, 0x01), And (SDMA, 0x02),
PRIT), FLAG)
Return (PBUF)
}
Method (_STM, 3, NotSerialized)
{
CreateDWordField (Arg0, 0x00, PIO0)
CreateDWordField (Arg0, 0x04, DMA0)
CreateDWordField (Arg0, 0x08, PIO1)
CreateDWordField (Arg0, 0x0C, DMA1)
CreateDWordField (Arg0, 0x10, FLAG)
Store (0x04, ICR2)
If (LEqual (SizeOf (Arg1), 0x0200))
{
And (PRIT, 0x40F0, PRIT)
And (SDMA, 0x0E, SDMA)
Store (0x00, SDT0)
And (ICR0, 0x0E, ICR0)
And (ICR1, 0x0E, ICR1)
And (ICR3, 0x0E, ICR3)
And (ICR5, 0x0E, ICR5)
CreateWordField (Arg1, 0x62, W490)
CreateWordField (Arg1, 0x6A, W530)
CreateWordField (Arg1, 0x7E, W630)
CreateWordField (Arg1, 0x80, W640)
CreateWordField (Arg1, 0xB0, W880)
Or (PRIT, 0x8004, PRIT)
If (LAnd (And (FLAG, 0x02), And (W490, 0x0800)))
{
Or (PRIT, 0x02, PRIT)
}
Or (PRIT, SETP (PIO0, W530, W640), PRIT)
If (And (FLAG, 0x01))
{
Or (SDMA, 0x01, SDMA)
Store (SETD (DMA0), SDT0)
If (And (W880, 0x20))
{
Or (ICR5, 0x01, ICR5)
}
If (And (W880, 0x10))
{
Or (ICR1, 0x01, ICR1)
}
If (LLess (DMA0, 0x1E))
{
Or (ICR3, 0x01, ICR3)
}
If (LLess (DMA0, 0x3C))
{
Or (ICR0, 0x01, ICR0)
}
}
}
If (LEqual (SizeOf (Arg2), 0x0200))
{
And (PRIT, 0x3F0F, PRIT)
Store (0x00, PSIT)
And (SDMA, 0x0D, SDMA)
Store (0x00, SDT1)
And (ICR0, 0x0D, ICR0)
And (ICR1, 0x0D, ICR1)
And (ICR3, 0x0D, ICR3)
And (ICR5, 0x0D, ICR5)
CreateWordField (Arg2, 0x62, W491)
CreateWordField (Arg2, 0x6A, W531)
CreateWordField (Arg2, 0x7E, W631)
CreateWordField (Arg2, 0x80, W641)
CreateWordField (Arg2, 0xB0, W881)
Or (PRIT, 0x8040, PRIT)
If (LAnd (And (FLAG, 0x08), And (W491, 0x0800)))
{
Or (PRIT, 0x20, PRIT)
}
If (And (FLAG, 0x10))
{
Or (PRIT, 0x4000, PRIT)
If (LGreater (PIO1, 0xF0))
{
Or (PRIT, 0x80, PRIT)
}
Else
{
Or (PRIT, 0x10, PRIT)
Store (SETT (PIO1, W531, W641), PSIT)
}
}
If (And (FLAG, 0x04))
{
Or (SDMA, 0x02, SDMA)
Store (SETD (DMA1), SDT1)
If (And (W881, 0x20))
{
Or (ICR5, 0x02, ICR5)
}
If (And (W881, 0x10))
{
Or (ICR1, 0x02, ICR1)
}
If (LLess (DMA0, 0x1E))
{
Or (ICR3, 0x02, ICR3)
}
If (LLess (DMA0, 0x3C))
{
Or (ICR0, 0x02, ICR0)
}
}
}
}
Device (P_D0)
{
Name (_ADR, 0x00)
Method (_GTF, 0, NotSerialized)
{
Name (PIB0, Buffer (0x0E)
{
/* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x03,
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF
})
CreateByteField (PIB0, 0x01, PMD0)
CreateByteField (PIB0, 0x08, DMD0)
If (And (PRIT, 0x02))
{
If (LEqual (And (PRIT, 0x09), 0x08))
{
Store (0x08, PMD0)
}
Else
{
Store (0x0A, PMD0)
ShiftRight (And (PRIT, 0x0300), 0x08, Local0)
ShiftRight (And (PRIT, 0x3000), 0x0C, Local1)
Add (Local0, Local1, Local2)
If (LEqual (0x03, Local2))
{
Store (0x0B, PMD0)
}
If (LEqual (0x05, Local2))
{
Store (0x0C, PMD0)
}
}
}
Else
{
Store (0x01, PMD0)
}
If (And (SDMA, 0x01))
{
Store (Or (SDT0, 0x40), DMD0)
If (And (ICR0, 0x01))
{
Add (DMD0, 0x02, DMD0)
}
If (And (ICR3, 0x01))
{
Store (0x45, DMD0)
}
}
Else
{
Or (Subtract (And (PMD0, 0x07), 0x02), 0x20, DMD0)
}
Return (PIB0)
}
}
Device (P_D1)
{
Name (_ADR, 0x01)
Method (_GTF, 0, NotSerialized)
{
Name (PIB1, Buffer (0x0E)
{
/* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF, 0x03,
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF
})
CreateByteField (PIB1, 0x01, PMD1)
CreateByteField (PIB1, 0x08, DMD1)
If (And (PRIT, 0x20))
{
If (LEqual (And (PRIT, 0x90), 0x80))
{
Store (0x08, PMD1)
}
Else
{
Add (And (PSIT, 0x03), ShiftRight (And (PSIT, 0x0C),
0x02), Local0)
If (LEqual (0x05, Local0))
{
Store (0x0C, PMD1)
}
Else
{
If (LEqual (0x03, Local0))
{
Store (0x0B, PMD1)
}
Else
{
Store (0x0A, PMD1)
}
}
}
}
Else
{
Store (0x01, PMD1)
}
If (And (SDMA, 0x02))
{
Store (Or (SDT1, 0x40), DMD1)
If (And (ICR0, 0x02))
{
Add (DMD1, 0x02, DMD1)
}
If (And (ICR3, 0x02))
{
Store (0x45, DMD1)
}
}
Else
{
Or (Subtract (And (PMD1, 0x07), 0x02), 0x20, DMD1)
}
Return (PIB1)
}
}
Method (_PS0, 0, NotSerialized)
{
}
Method (_PS3, 0, NotSerialized)
{
}
}
Method (GETP, 1, NotSerialized)
{
If (LEqual (And (Arg0, 0x09), 0x00))
{
Return (0xFFFFFFFF)
}
If (LEqual (And (Arg0, 0x09), 0x08))
{
Return (0x0384)
}
ShiftRight (And (Arg0, 0x0300), 0x08, Local0)
ShiftRight (And (Arg0, 0x3000), 0x0C, Local1)
Return (Multiply (0x1E, Subtract (0x09, Add (Local0, Local1))
))
}
Method (GETD, 4, NotSerialized)
{
If (Arg0)
{
If (Arg1)
{
Return (0x14)
}
If (Arg2)
{
Return (Multiply (Subtract (0x04, Arg3), 0x0F))
}
Return (Multiply (Subtract (0x04, Arg3), 0x1E))
}
Return (0xFFFFFFFF)
}
Method (GETT, 1, NotSerialized)
{
Return (Multiply (0x1E, Subtract (0x09, Add (And (ShiftRight (Arg0, 0x02
), 0x03), And (Arg0, 0x03)))))
}
Method (GETF, 3, NotSerialized)
{
Name (TMPF, 0x00)
If (Arg0)
{
Or (TMPF, 0x01, TMPF)
}
If (And (Arg2, 0x02))
{
Or (TMPF, 0x02, TMPF)
}
If (Arg1)
{
Or (TMPF, 0x04, TMPF)
}
If (And (Arg2, 0x20))
{
Or (TMPF, 0x08, TMPF)
}
If (And (Arg2, 0x4000))
{
Or (TMPF, 0x10, TMPF)
}
Return (TMPF)
}
Method (SETP, 3, NotSerialized)
{
If (LGreaterEqual (Arg0, 0xF0))
{
Return (0x08)
}
Else
{
If (And (Arg1, 0x02))
{
If (LAnd (LLessEqual (Arg0, 0x78), And (Arg2, 0x02)))
{
Return (0x2301)
}
If (LAnd (LLessEqual (Arg0, 0xB4), And (Arg2, 0x01)))
{
Return (0x2101)
}
}
Return (0x1001)
}
}
Method (SETD, 1, NotSerialized)
{
If (LLessEqual (Arg0, 0x17))
{
Return (0x01)
}
If (LLessEqual (Arg0, 0x1E))
{
Return (0x02)
}
If (LLessEqual (Arg0, 0x2D))
{
Return (0x01)
}
If (LLessEqual (Arg0, 0x3C))
{
Return (0x02)
}
If (LLessEqual (Arg0, 0x5A))
{
Return (0x01)
}
Return (0x00)
}
Method (SETT, 3, NotSerialized)
{
If (And (Arg1, 0x02))
{
If (LAnd (LLessEqual (Arg0, 0x78), And (Arg2, 0x02)))
{
Return (0x0B)
}
If (LAnd (LLessEqual (Arg0, 0xB4), And (Arg2, 0x01)))
{
Return (0x09)
}
}
Return (0x04)
}
}
Scope (\_TZ)
{
Name (Z006, Package (0x02)
{
Package (0x03)
{
0x4B,
0x50,
0x58
},
Package (0x03)
{
0x55,
0x5A,
0x7F
}
})
Mutex (Z007, 0x00)
Name (READ, 0x0B9C)
Name (RPOR, 0x0B9C)
Name (CZON, 0x00)
Name (CTMP, 0x00)
ThermalZone (TZ1)
{
Method (_PSV, 0, NotSerialized)
{
Return (0x0DFE)
}
Name (_PSL, Package (0x01)
{
\_PR.CPU0
})
Method (_SCP, 1, NotSerialized)
{
Store (Arg0, Debug)
}
Name (_TSP, 0x32)
Name (_TC1, 0x01)
Name (_TC2, 0x02)
Name (_CRT, 0x0E62)
Method (_TMP, 0, NotSerialized)
{
Store ("........._TMP Called...........", Debug)
Store (\_SB.PCI0.LPC0.SIO.RTMP (), Local0)
Store (DerefOf (Index (Local0, 0x00)), Local1)
Store (DerefOf (Index (Local0, 0x01)), Local2)
If (LNotEqual (Local2, 0x00))
{
Add (Local1, 0x01, Local1)
}
Store ("Read back from sensor", Debug)
Store (Local1, Debug)
If (LEqual (\_TZ.CTMP, 0x01))
{
Store (0x62, Local1)
}
Store (Match (DerefOf (Index (\_TZ.Z006, 0x01)), MGT, Local1, MTR,
0x00, 0x00), Local2)
Store (".............Current Zone Value.........", Debug)
Store (\_TZ.CZON, Debug)
Store ("..............New Zone Value.........", Debug)
Store (Local2, Debug)
If (LNotEqual (Local2, \_TZ.CZON))
{
Store ("..........Change Zone........", Debug)
Store (Local2, \_TZ.CZON)
If (LEqual (Local2, 0x02))
{
Store (0x62, Local3)
}
Else
{
Store (DerefOf (Index (DerefOf (Index (\_TZ.Z006, 0x01)), Local2)),
Local3)
}
Store (Local3, Debug)
\_SB.PCI0.LPC0.SIO.STMP (Local3)
Notify (\_TZ.TZ1, 0x81)
}
Multiply (Local1, 0x0A, Local2)
Add (Local2, 0x0AAC, Local3)
Store ("Temperature From Sensor is", Debug)
Store (Local3, Debug)
Store (Local3, Local4)
If (LLess (Local3, 0x0B4B))
{
If (LLess (\_TZ.READ, 0x0B4B))
{
Store (0x0B4B, \_TZ.RPOR)
}
Store (\_TZ.RPOR, Local3)
}
Store (Local4, \_TZ.READ)
Store (Local3, \_TZ.RPOR)
Return (Local3)
}
}
}
}
}
Name (FWSO, "FWSO")
Name (_PSC, 0x00)
Method (_PS0, 0, NotSerialized)
{
Store (_PSC, Local0)
Store (0x00, _PSC)
If (LEqual (Local0, 0x03))
{
Store (0x01, \_SB.INF)
While (\_SB.INF)
{
Store (0x20, \_SB.BCMD)
Store (Zero, \_SB.SMIC)
If (LAnd (LEqual (\_SB.INF, 0x01), LGreaterEqual (\_SB.OSTB, Z008)))
{
Sleep (0x01F4)
}
}
}
}
Method (_PS3, 0, NotSerialized)
{
Store (0x03, _PSC)
}
}
[-- Attachment #3: Type: TEXT/PLAIN, Size: 22770 bytes --]
Linux version 3.0.0 (root@memphis) (gcc version 4.4.6 20101016 (prerelease) (GCC) ) #6 PREEMPT Fri Aug 5 09:42:59 SGT 2011
BIOS-provided physical RAM map:
BIOS-e820: 0000000000000000 - 000000000009f800 (usable)
BIOS-e820: 000000000009f800 - 00000000000a0000 (reserved)
BIOS-e820: 00000000000d8000 - 00000000000e0000 (reserved)
BIOS-e820: 00000000000e4000 - 0000000000100000 (reserved)
BIOS-e820: 0000000000100000 - 000000001fe70000 (usable)
BIOS-e820: 000000001fe70000 - 000000001fe7c000 (ACPI data)
BIOS-e820: 000000001fe7c000 - 000000001fe80000 (ACPI NVS)
BIOS-e820: 000000001fe80000 - 0000000020000000 (reserved)
BIOS-e820: 00000000ff800000 - 00000000ffc00000 (reserved)
BIOS-e820: 00000000fff00000 - 0000000100000000 (reserved)
Notice: NX (Execute Disable) protection missing in CPU!
DMI present.
DMI: Intermec Technologies CV60R2/Solano System CR Platform, BIOS 6.00 02/12/09
e820 update range: 0000000000000000 - 0000000000010000 (usable) ==> (reserved)
e820 remove range: 00000000000a0000 - 0000000000100000 (usable)
last_pfn = 0x1fe70 max_arch_pfn = 0x100000
MTRR default type: uncachable
MTRR fixed ranges enabled:
00000-9FFFF write-back
A0000-BFFFF uncachable
C0000-C7FFF write-protect
C8000-EFFFF uncachable
F0000-FFFFF write-protect
MTRR variable ranges enabled:
0 base 000000000 mask FE0000000 write-back
1 base 01FE80000 mask FFFF80000 uncachable
2 base 01FF00000 mask FFFF00000 uncachable
3 disabled
4 disabled
5 disabled
6 disabled
7 disabled
PAT not supported by CPU.
initial memory mapped : 0 - 01800000
Base memory trampoline at [c009c000] 9c000 size 12288
init_memory_mapping: 0000000000000000-000000001fe70000
0000000000 - 0000400000 page 4k
0000400000 - 001fc00000 page 2M
001fc00000 - 001fe70000 page 4k
kernel direct mapping tables up to 1fe70000 @ 17fb000-1800000
ACPI: RSDP 000f7200 00014 (v00 PTLTD )
ACPI: RSDT 1fe7947a 0002C (v01 PTLTD RSDT 06040000 LTP 00000000)
ACPI: FACP 1fe7bf64 00074 (v01 INTEL OSPREY2 06040000 MRJ! 00000001)
ACPI: DSDT 1fe794a6 02ABE (v01 INTEL SolanoM2 06040000 MSFT 0100000E)
ACPI: FACS 1fe7cfc0 00040
ACPI: BOOT 1fe7bfd8 00028 (v01 PTLTD $SBFTBL$ 06040000 LTP 00000001)
0MB HIGHMEM available.
510MB LOWMEM available.
mapped low ram: 0 - 1fe70000
low ram: 0 - 1fe70000
Zone PFN ranges:
DMA 0x00000010 -> 0x00001000
Normal 0x00001000 -> 0x0001fe70
HighMem empty
Movable zone start PFN for each node
early_node_map[2] active PFN ranges
0: 0x00000010 -> 0x0000009f
0: 0x00000100 -> 0x0001fe70
On node 0 totalpages: 130559
DMA zone: 32 pages used for memmap
DMA zone: 0 pages reserved
DMA zone: 3951 pages, LIFO batch:0
Normal zone: 989 pages used for memmap
Normal zone: 125587 pages, LIFO batch:31
ACPI: PM-Timer IO Port: 0x1008
Allocating PCI resources starting at 20000000 (gap: 20000000:df800000)
pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
pcpu-alloc: [0] 0
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 129538
Kernel command line: BOOT_IMAGE=(hd0,14)/linux/bzc1 root=/dev/hda2 ro resume=/dev/hda3 reboot=bios mce x11 pnp.debug console= vga=0x315 testing_only=\"this is got to be good. Now I can send in a very long line just like 2.4 and need not worry about the line long line just like 2.4 and need not worry about the lin8 long line just like 2.4 and need not worry about the lin9 being too long. What a great way to start a great year!!! Cool!\"
Booting kernel: `' invalid for parameter `pnp.debug'
PID hash table entries: 2048 (order: 1, 8192 bytes)
Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
Initializing CPU#0
Initializing HighMem for node 0 (00000000:00000000)
Memory: 512452k/522688k available (3469k kernel code, 9784k reserved, 1255k data, 308k init, 0k highmem)
virtual kernel memory layout:
fixmap : 0xfffe5000 - 0xfffff000 ( 104 kB)
pkmap : 0xff800000 - 0xffc00000 (4096 kB)
vmalloc : 0xe0670000 - 0xff7fe000 ( 497 MB)
lowmem : 0xc0000000 - 0xdfe70000 ( 510 MB)
.init : 0xc149e000 - 0xc14eb000 ( 308 kB)
.data : 0xc13634c6 - 0xc149d200 (1255 kB)
.text : 0xc1000000 - 0xc13634c6 (3469 kB)
Checking if this processor honours the WP bit even in supervisor mode...Ok.
SLUB: Genslabs=15, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
Preemptible hierarchical RCU implementation.
NR_IRQS:16
CPU 0 irqstacks, hard=df406000 soft=df408000
Console: colour VGA+ 80x25
console [tty0] enabled
Fast TSC calibration using PIT
Detected 799.771 MHz processor.
Calibrating delay loop (skipped), value calculated using timer frequency.. 1599.54 BogoMIPS (lpj=7997710)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
mce: CPU supports 5 MCE banks
CPU: Intel(R) Pentium(R) III CPU - S 800MHz stepping 04
ACPI: Core revision 20110413
ACPI: setting ELCR to 0200 (from 02a0)
Performance Events:
no APIC, boot with the "lapic" boot parameter to force-enable it.
no hardware sampling interrupt available.
p6 PMU driver.
... version: 0
... bit width: 32
... generic registers: 2
... value mask: 00000000ffffffff
... max period: 000000007fffffff
... fixed-purpose events: 0
... event mask: 0000000000000003
NET: Registered protocol family 16
ACPI: bus type pci registered
PCI: PCI BIOS revision 2.10 entry at 0xfd9b2, last bus=1
bio: create slab <bio-0> at 0
ACPI: EC: Look up EC in DSDT
ACPI: Interpreter enabled
ACPI: (supports S0 S5)
ACPI: Using PIC for interrupt routing
ACPI: Power Resource [NICP] (on)
PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff])
pci_root PNP0A03:00: host bridge window [io 0x0000-0x0cf7]
pci_root PNP0A03:00: host bridge window [mem 0x000a0000-0x000bffff]
pci_root PNP0A03:00: host bridge window [mem 0x000d0000-0x000d3fff]
pci_root PNP0A03:00: host bridge window [mem 0x000d4000-0x000d7fff]
pci_root PNP0A03:00: host bridge window [mem 0x000e0000-0x000e3fff]
pci_root PNP0A03:00: host bridge window [mem 0x20000000-0xfebfffff]
pci_root PNP0A03:00: host bridge window [io 0x0d00-0xffff]
pci 0000:00:00.0: [8086:1130] type 0 class 0x000600
pci 0000:00:02.0: [8086:1132] type 0 class 0x000300
pci 0000:00:02.0: reg 10: [mem 0xf8000000-0xfbffffff pref]
pci 0000:00:02.0: reg 14: [mem 0xf4000000-0xf407ffff]
pci 0000:00:1e.0: [8086:244e] type 1 class 0x000604
pci 0000:00:1f.0: [8086:2440] type 0 class 0x000601
pci 0000:00:1f.0: quirk: [io 0x1000-0x107f] claimed by ICH4 ACPI/GPIO/TCO
pci 0000:00:1f.0: quirk: [io 0x1180-0x11bf] claimed by ICH4 GPIO
pci 0000:00:1f.1: [8086:244b] type 0 class 0x000101
pci 0000:00:1f.1: reg 20: [io 0x1800-0x180f]
pci 0000:00:1f.2: [8086:2442] type 0 class 0x000c03
pci 0000:00:1f.2: reg 20: [io 0x1820-0x183f]
pci 0000:00:1f.3: [8086:2443] type 0 class 0x000c05
pci 0000:00:1f.3: reg 20: [io 0x1810-0x181f]
pci 0000:00:1f.4: [8086:2444] type 0 class 0x000c03
pci 0000:00:1f.4: reg 20: [io 0x1840-0x185f]
pci 0000:00:1f.5: [8086:2445] type 0 class 0x000401
pci 0000:00:1f.5: reg 10: [io 0x1c00-0x1cff]
pci 0000:00:1f.5: reg 14: [io 0x1880-0x18bf]
pci 0000:01:01.0: [104c:ac56] type 2 class 0x000607
pci 0000:01:01.0: reg 10: [mem 0xf4102000-0xf4102fff]
pci 0000:01:01.0: supports D1 D2
pci 0000:01:01.0: PME# supported from D0 D1 D2 D3hot
pci 0000:01:01.0: PME# disabled
pci 0000:01:02.0: [1260:3890] type 0 class 0x000280
pci 0000:01:02.0: reg 10: [mem 0xf4100000-0xf4101fff]
pci 0000:01:02.0: supports D1 D2
pci 0000:01:02.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:01:02.0: PME# disabled
pci 0000:01:08.0: [8086:2449] type 0 class 0x000200
pci 0000:01:08.0: reg 10: [mem 0xf4103000-0xf4103fff]
pci 0000:01:08.0: reg 14: [io 0x2800-0x283f]
pci 0000:01:08.0: supports D1 D2
pci 0000:01:08.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:01:08.0: PME# disabled
pci 0000:00:1e.0: PCI bridge to [bus 01-01] (subtractive decode)
pci 0000:00:1e.0: bridge window [io 0x2000-0x2fff]
pci 0000:00:1e.0: bridge window [mem 0xf4100000-0xf44fffff]
pci 0000:00:1e.0: bridge window [mem 0xfff00000-0x000fffff pref] (disabled)
pci 0000:00:1e.0: bridge window [io 0x0000-0x0cf7] (subtractive decode)
pci 0000:00:1e.0: bridge window [mem 0x000a0000-0x000bffff] (subtractive decode)
pci 0000:00:1e.0: bridge window [mem 0x000d0000-0x000d3fff] (subtractive decode)
pci 0000:00:1e.0: bridge window [mem 0x000d4000-0x000d7fff] (subtractive decode)
pci 0000:00:1e.0: bridge window [mem 0x000e0000-0x000e3fff] (subtractive decode)
pci 0000:00:1e.0: bridge window [mem 0x20000000-0xfebfffff] (subtractive decode)
pci 0000:00:1e.0: bridge window [io 0x0d00-0xffff] (subtractive decode)
pci_bus 0000:02: [bus 02-05] partially hidden behind transparent bridge 0000:01 [bus 01-01]
pci_bus 0000:00: on NUMA node 0
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.HUB_._PRT]
pci0000:00: Unable to request _OSC control (_OSC support mask: 0x0e)
ACPI: PCI Interrupt Link [LNKA] (IRQs 5) *9
ACPI: PCI Interrupt Link [LNKB] (IRQs *5)
ACPI: PCI Interrupt Link [LNKC] (IRQs *5)
ACPI: PCI Interrupt Link [LNKD] (IRQs *5)
ACPI: PCI Interrupt Link [LNKE] (IRQs *5)
ACPI: PCI Interrupt Link [LNKF] (IRQs 5) *0, disabled.
ACPI: PCI Interrupt Link [LNKG] (IRQs 5) *0, disabled.
ACPI: PCI Interrupt Link [LNKH] (IRQs *7)
vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none
vgaarb: loaded
vgaarb: bridge control possible 0000:00:02.0
SCSI subsystem initialized
libata version 3.00 loaded.
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
Advanced Linux Sound Architecture Driver Version 1.0.24.
PCI: Using ACPI for IRQ routing
PCI: pci_cache_line_size set to 32 bytes
reserve RAM buffer: 000000000009f800 - 000000000009ffff
reserve RAM buffer: 000000001fe70000 - 000000001fffffff
Switching to clocksource pit
pnp: PnP ACPI init
ACPI: bus type pnp registered
pnp 00:00: [bus 00-ff]
pnp 00:00: [io 0x0cf8-0x0cff]
pnp 00:00: [io 0x0000-0x0cf7 window]
pnp 00:00: [mem 0x000a0000-0x000bffff window]
pnp 00:00: [mem 0x000c0000-0x000c3fff window]
pnp 00:00: [mem 0x000c4000-0x000c7fff window]
pnp 00:00: [mem 0x000c8000-0x000cbfff window]
pnp 00:00: [mem 0x000cc000-0x000cffff window]
pnp 00:00: [mem 0x000d0000-0x000d3fff window]
pnp 00:00: [mem 0x000d4000-0x000d7fff window]
pnp 00:00: [mem 0x000d8000-0x000dbfff window]
pnp 00:00: [mem 0x000dc000-0x000dffff window]
pnp 00:00: [mem 0x000e0000-0x000e3fff window]
pnp 00:00: [mem 0x000e4000-0x000e7fff window]
pnp 00:00: [mem 0x000e8000-0x000ebfff window]
pnp 00:00: [mem 0x000ec000-0x000effff window]
pnp 00:00: [mem 0x20000000-0xfebfffff window]
pnp 00:00: [io 0x0d00-0xffff window]
pnp 00:00: Plug and Play ACPI device, IDs PNP0a03 (active)
pnp 00:01: [mem 0x1ff00000-0x1fffffff]
system 00:01: [mem 0x1ff00000-0x1fffffff] has been reserved
system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp 00:02: [io 0x0010-0x001f]
pnp 00:02: [io 0x0024-0x0025]
pnp 00:02: [io 0x0028-0x0029]
pnp 00:02: [io 0x002c-0x002d]
pnp 00:02: [io 0x002e-0x002f]
pnp 00:02: [io 0x0030-0x0031]
pnp 00:02: [io 0x0034-0x0035]
pnp 00:02: [io 0x0038-0x0039]
pnp 00:02: [io 0x003c-0x003d]
pnp 00:02: [io 0x004e-0x004f]
pnp 00:02: [io 0x0050-0x0053]
pnp 00:02: [io 0x0072-0x0077]
pnp 00:02: [io 0x0080]
pnp 00:02: [io 0x0090-0x009f]
pnp 00:02: [io 0x00a4-0x00a5]
pnp 00:02: [io 0x00a8-0x00a9]
pnp 00:02: [io 0x00ac-0x00ad]
pnp 00:02: [io 0x00b0-0x00b5]
pnp 00:02: [io 0x00b8-0x00b9]
pnp 00:02: [io 0x00bc-0x00bd]
pnp 00:02: [io 0x0200-0x0207]
pnp 00:02: [io 0x0290-0x0297]
pnp 00:02: [io 0x0330-0x0331]
pnp 00:02: [io 0x04d0-0x04d1]
pnp 00:02: [io 0x1000-0x107f]
pnp 00:02: [io 0x1180-0x11bf]
pnp 00:02: [mem 0xff800000-0xffffffff]
system 00:02: [io 0x0200-0x0207] has been reserved
system 00:02: [io 0x0290-0x0297] has been reserved
system 00:02: [io 0x0330-0x0331] has been reserved
system 00:02: [io 0x04d0-0x04d1] has been reserved
system 00:02: [io 0x1000-0x107f] has been reserved
system 00:02: [io 0x1180-0x11bf] has been reserved
system 00:02: [mem 0xff800000-0xffffffff] could not be reserved
system 00:02: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp 00:03: [io 0x0000-0x000f]
pnp 00:03: [io 0x0081-0x008f]
pnp 00:03: [io 0x00c0-0x00df]
pnp 00:03: [dma 4]
pnp 00:03: Plug and Play ACPI device, IDs PNP0200 (active)
pnp 00:04: [io 0x00f0-0x00fe]
pnp 00:04: [irq 13]
pnp 00:04: Plug and Play ACPI device, IDs PNP0c04 (active)
pnp 00:05: [io 0x0070-0x0071]
pnp 00:05: [irq 8]
pnp 00:05: Plug and Play ACPI device, IDs PNP0b00 (active)
pnp 00:06: [io 0x0061]
pnp 00:06: Plug and Play ACPI device, IDs PNP0800 (active)
pnp 00:07: [io 0x0060]
pnp 00:07: [io 0x0064]
pnp 00:07: [irq 1]
pnp 00:07: Plug and Play ACPI device, IDs PNP0303 (active)
pnp 00:08: [io 0x03f8-0x03ff]
pnp 00:08: [irq 4]
pnp 00:08: Plug and Play ACPI device, IDs PNP0501 (active)
pnp 00:09: [io 0x02f8-0x02ff]
pnp 00:09: [irq 3]
pnp 00:09: Plug and Play ACPI device, IDs PNP0501 (active)
pnp 00:0a: Plug and Play ACPI device, IDs PNP4972 (disabled)
pnp 00:0b: [io 0x02e8-0x02ef]
pnp 00:0b: [irq 12]
pnp 00:0b: Plug and Play ACPI device, IDs PNP0501 (active)
pnp: PnP ACPI: found 12 devices
ACPI: ACPI bus type pnp unregistered
Switching to clocksource acpi_pm
PCI: max bus depth: 2 pci_try_num: 3
pci 0000:00:1e.0: BAR 9: assigned [mem 0x20000000-0x23ffffff pref]
pci 0000:01:01.0: BAR 9: assigned [mem 0x20000000-0x23ffffff pref]
pci 0000:01:01.0: BAR 10: assigned [mem 0x24000000-0x27ffffff]
pci 0000:01:01.0: BAR 7: assigned [io 0x2000-0x20ff]
pci 0000:01:01.0: BAR 8: assigned [io 0x2400-0x24ff]
pci 0000:01:01.0: CardBus bridge to [bus 02-05]
pci 0000:01:01.0: bridge window [io 0x2000-0x20ff]
pci 0000:01:01.0: bridge window [io 0x2400-0x24ff]
pci 0000:01:01.0: bridge window [mem 0x20000000-0x23ffffff pref]
pci 0000:01:01.0: bridge window [mem 0x24000000-0x27ffffff]
pci 0000:00:1e.0: PCI bridge to [bus 01-01]
pci 0000:00:1e.0: bridge window [io 0x2000-0x2fff]
pci 0000:00:1e.0: bridge window [mem 0xf4100000-0xf44fffff]
pci 0000:00:1e.0: bridge window [mem 0x20000000-0x23ffffff pref]
pci 0000:00:1e.0: setting latency timer to 64
ACPI: PCI Interrupt Link [LNKB] enabled at IRQ 5
PCI: setting IRQ 5 as level-triggered
pci 0000:01:01.0: PCI INT A -> Link[LNKB] -> GSI 5 (level, low) -> IRQ 5
pci_bus 0000:00: resource 4 [io 0x0000-0x0cf7]
pci_bus 0000:00: resource 5 [mem 0x000a0000-0x000bffff]
pci_bus 0000:00: resource 6 [mem 0x000d0000-0x000d3fff]
pci_bus 0000:00: resource 7 [mem 0x000d4000-0x000d7fff]
pci_bus 0000:00: resource 8 [mem 0x000e0000-0x000e3fff]
pci_bus 0000:00: resource 9 [mem 0x20000000-0xfebfffff]
pci_bus 0000:00: resource 10 [io 0x0d00-0xffff]
pci_bus 0000:01: resource 0 [io 0x2000-0x2fff]
pci_bus 0000:01: resource 1 [mem 0xf4100000-0xf44fffff]
pci_bus 0000:01: resource 2 [mem 0x20000000-0x23ffffff pref]
pci_bus 0000:01: resource 4 [io 0x0000-0x0cf7]
pci_bus 0000:01: resource 5 [mem 0x000a0000-0x000bffff]
pci_bus 0000:01: resource 6 [mem 0x000d0000-0x000d3fff]
pci_bus 0000:01: resource 7 [mem 0x000d4000-0x000d7fff]
pci_bus 0000:01: resource 8 [mem 0x000e0000-0x000e3fff]
pci_bus 0000:01: resource 9 [mem 0x20000000-0xfebfffff]
pci_bus 0000:01: resource 10 [io 0x0d00-0xffff]
pci_bus 0000:02: resource 0 [io 0x2000-0x20ff]
pci_bus 0000:02: resource 1 [io 0x2400-0x24ff]
pci_bus 0000:02: resource 2 [mem 0x20000000-0x23ffffff pref]
pci_bus 0000:02: resource 3 [mem 0x24000000-0x27ffffff]
NET: Registered protocol family 2
IP route cache hash table entries: 4096 (order: 2, 16384 bytes)
TCP established hash table entries: 16384 (order: 5, 131072 bytes)
TCP bind hash table entries: 16384 (order: 4, 65536 bytes)
TCP: Hash tables configured (established 16384 bind 16384)
TCP reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
pci 0000:00:02.0: Boot video device
pci 0000:01:08.0: Firmware left e100 interrupts enabled; disabling
PCI: CLS 32 bytes, default 32
Simple Boot Flag at 0x36 set to 0x1
Switched to NOHz mode on CPU #0
NTFS driver 2.1.30 [Flags: R/W].
Btrfs loaded
msgmni has been set to 1000
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253)
io scheduler noop registered (default)
pci_hotplug: PCI Hot Plug PCI Core version: 0.5
pciehp: PCI Express Hot Plug Controller Driver version: 0.4
vga16fb: initializing
vga16fb: mapped to 0xc00a0000
Console: switching to colour frame buffer device 80x30
fb0: VGA16 VGA frame buffer device
input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input0
ACPI: Power Button [PWRF]
ACPI: acpi_idle registered with cpuidle
Marking TSC unstable due to TSC halts in idle
thermal LNXTHERM:00: registered as thermal_zone0
ACPI: Thermal Zone [TZ1] (46 C)
Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
serial8250: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A
serial8250: ttyS3 at I/O 0x2e8 (irq = 3) is a 16550A
00:08: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
00:09: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A
00:0b: ttyS3 at I/O 0x2e8 (irq = 12) is a 16550A
Non-volatile memory driver v1.3
Linux agpgart interface v0.103
agpgart-intel 0000:00:00.0: Intel i815 Chipset
agpgart-intel 0000:00:00.0: detected gtt size: 65536K total, 65536K mappable
agpgart-intel 0000:00:00.0: AGP aperture is 64M @ 0xf8000000
[drm] Initialized drm 1.1.0 20060810
brd: module loaded
loop: module loaded
Uniform Multi-Platform E-IDE driver
piix 0000:00:1f.1: IDE controller (0x8086:0x244b rev 0x05)
piix 0000:00:1f.1: IDE port disabled
piix 0000:00:1f.1: not 100% native mode: will probe irqs later
ide0: BM-DMA at 0x1800-0x1807
Probing IDE interface ide0...
hda: FUJITSU MHW2040AT, ATA DISK drive
hda: host max PIO4 wanted PIO255(auto-tune) selected PIO4
hda: UDMA/100 mode selected
ide0 at 0x1f0-0x1f7,0x3f6 on irq 14
ide-gd driver 1.18
hda: max request size: 128KiB
hda: 78140160 sectors (40007 MB) w/8192KiB Cache, CHS=65535/16/63
hda: cache flushes supported
hda: hda2 hda3 hda4 < hda5 hda6 hda7 hda8 hda9 hda10 hda11 hda12 hda13 hda14 hda15 >
Intel(R) Gigabit Ethernet Network Driver - version 3.0.6-k2
Copyright (c) 2007-2011 Intel Corporation.
pcnet32: pcnet32.c:v1.35 21.Apr.2008 tsbogend@alpha.franken.de
e100: Intel(R) PRO/100 Network Driver, 3.5.24-k2-NAPI
e100: Copyright(c) 1999-2006 Intel Corporation
e100 0000:01:08.0: power state changed by ACPI to D0
e100 0000:01:08.0: power state changed by ACPI to D0
ACPI: PCI Interrupt Link [LNKE] enabled at IRQ 5
e100 0000:01:08.0: PCI INT A -> Link[LNKE] -> GSI 5 (level, low) -> IRQ 5
e100 0000:01:08.0: PME# disabled
e100 0000:01:08.0: eth0: addr 0xf4103000, irq 5, MAC addr 00:10:40:08:50:e8
tun: Universal TUN/TAP device driver, 1.6
tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
Fusion MPT base driver 3.04.19
Copyright (c) 1999-2008 LSI Corporation
Fusion MPT SPI Host driver 3.04.19
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
uhci_hcd: USB Universal Host Controller Interface driver
ACPI: PCI Interrupt Link [LNKD] enabled at IRQ 5
uhci_hcd 0000:00:1f.2: PCI INT D -> Link[LNKD] -> GSI 5 (level, low) -> IRQ 5
uhci_hcd 0000:00:1f.2: setting latency timer to 64
uhci_hcd 0000:00:1f.2: UHCI Host Controller
uhci_hcd 0000:00:1f.2: new USB bus registered, assigned bus number 1
uhci_hcd 0000:00:1f.2: irq 5, io base 0x00001820
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 2 ports detected
ACPI: PCI Interrupt Link [LNKH] enabled at IRQ 7
PCI: setting IRQ 7 as level-triggered
uhci_hcd 0000:00:1f.4: PCI INT C -> Link[LNKH] -> GSI 7 (level, low) -> IRQ 7
uhci_hcd 0000:00:1f.4: setting latency timer to 64
uhci_hcd 0000:00:1f.4: UHCI Host Controller
uhci_hcd 0000:00:1f.4: new USB bus registered, assigned bus number 2
uhci_hcd 0000:00:1f.4: irq 7, io base 0x00001840
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 2 ports detected
i8042: PNP: PS/2 Controller [PNP0303:KBC0] at 0x60,0x64 irq 1
i8042: PNP: PS/2 appears to have AUX port disabled, if this is incorrect please boot with i8042.nopnp
serio: i8042 KBD port at 0x60,0x64 irq 1
mousedev: PS/2 mouse device common for all mice
rtc_cmos 00:05: rtc core: registered rtc_cmos as rtc0
rtc0: alarms up to one month, y3k, 114 bytes nvram
device-mapper: ioctl: 4.20.0-ioctl (2011-02-02) initialised: dm-devel@redhat.com
EDAC MC: Ver: 2.1.0
cpuidle: using governor ladder
cpuidle: using governor menu
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
Intel ICH 0000:00:1f.5: PCI INT B -> Link[LNKB] -> GSI 5 (level, low) -> IRQ 5
Intel ICH 0000:00:1f.5: setting latency timer to 64
intel8x0_measure_ac97_clock: measured 51300 usecs (2466 samples)
intel8x0: clocking to 48000
ALSA device list:
#0: Intel 82801BA-ICH2 with STAC9750,51 at irq 5
Netfilter messages via NETLINK v0.30.
nf_conntrack version 0.5.0 (8007 buckets, 32028 max)
input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input1
ip_tables: (C) 2000-2006 Netfilter Core Team
arp_tables: (C) 2002 David S. Miller
TCP bic registered
TCP cubic registered
TCP highspeed registered
NET: Registered protocol family 17
lib80211: common routines for IEEE802.11 drivers
lib80211_crypt: registered algorithm 'NULL'
rtc_cmos 00:05: setting system clock to 2011-08-10 22:32:20 UTC (1313015540)
VFS: Mounted root (reiserfs filesystem) readonly on device 3:2.
Freeing unused kernel memory: 308k freed
Adding 2047996k swap on /dev/hda3. Priority:-1 extents:1 across:2047996k
Bluetooth: Core ver 2.16
NET: Registered protocol family 31
Bluetooth: HCI device and connection manager initialized
Bluetooth: HCI socket layer initialized
Bluetooth: L2CAP socket layer initialized
Bluetooth: SCO socket layer initialized
Bluetooth: Generic Bluetooth USB driver ver 0.6
usbcore: registered new interface driver btusb
e100 0000:01:08.0: eth0: NIC Link is Up 100 Mbps Full Duplex
Bluetooth: RFCOMM TTY layer initialized
Bluetooth: RFCOMM socket layer initialized
Bluetooth: RFCOMM ver 1.11
mtrr: base(0xf8000000) is not aligned on a size(0x3000000) boundary
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: How to access serial port that is set in BIOS as OS Controlled
2011-08-11 9:07 Jeff Chua
@ 2011-08-11 21:49 ` Bjorn Helgaas
0 siblings, 0 replies; 10+ messages in thread
From: Bjorn Helgaas @ 2011-08-11 21:49 UTC (permalink / raw)
To: Jeff Chua; +Cc: Andrey Panin, lkml, Matthew Garrett
[-- Attachment #1: Type: text/plain, Size: 3387 bytes --]
On Thu, Aug 11, 2011 at 3:07 AM, Jeff Chua <jeff.chua.linux@gmail.com> wrote:
>
>
> On Thu, Aug 11, 2011 at 12:46 AM, Bjorn Helgaas <bhelgaas@google.com> wrote:
>>
>> On Fri, Aug 5, 2011 at 7:02 PM, Jeff Chua <jeff.chua.linux@gmail.com>
>
> wrote:
>>
>> Ping, just a reminder :)
>> I'm pretty sure Linux only runs _SRS when we actually *change* something,
>> which doesn't seem to follow the intent of the spec. So if
>> we can get a little more evidence here, I think it'd be worth changing
>> Linux to call _SRS for every device when it enumerates it.
>
> I did some test and it seems "auto" didn't enable the port. With "auto",
> dmesg showed more info (io 0x3e8-0x3ef irq 6), but port still disabled.
>
> After "activate", then the port can be used.
Yep, that's what I would expect. "auto" does some work in the kernel
to choose resources that look like they should work, but it doesn't
touch the firmware or the hardware itself. "activate" evaluates the
ACPI _SRS method, which is how we tell the firmware what resources we
want. The _SRS method would program those into the hardware.
> I've attached the DSDT.dat.dsl. I've reconfigured the kernel with
> CONFIG_PNP_DEBUG_MESSAGES=y, booting with "pnp.debug", but there were not a
> lot of messages in dmesg.
Oops, my mistake. You now need "pnp.debug=1" to turn the extra debug
on (I just posted a patch to update
Documentation/kernel-parameters.txt).
> 00:0a PNP4972 (unknown)
> # cat /sys/bus/pnp/devices/00:0a/resources
> state = disabled
> io 0x3e8-0x3ef
> irq 6
>
> # setserial /dev/ttyS2 uart 16550a irq 6
> ttyS2: LSR safety check engaged!
> ttyS2: LSR safety check engaged!
Hmm, the fact that you need "setserial" is telling us there's another
Linux bug here. PNP4972 is not one of the PNP IDs the 8250_pnp driver
knows about (I would have expected ACPI to supply a "compatible device
ID" of PNP0501 so we could fall back to the generic 8250_pnp driver),
so we currently don't have a path to get the I/O port address or the
IRQ info to the serial driver automatically. On x86, the 8250 driver
has some hardcoded addresses compiled into it (ttyS2 at 0x3e8 being
one of them), and "setserial" is the manual way of changing the
default IRQ 4 to IRQ 6.
> # echo disable > /sys/bus/pnp/devices/00:0a/resources
>
> # dmesg
> pnp 00:0a: disabled
>
> # cat /sys/bus/pnp/devices/00:0a/resources
> state = disabled
>
> # echo activate > /sys/bus/pnp/devices/00:0a/resources
> -bash: echo: write error: Device or resource busy
This *should* work. My guess is that it's failing because the I/O
ports at 0x3e8 are still reserved. The PNP core doesn't actually
reserve anything, so it would have to be the 8250 driver. It doesn't
mention those ports in dmesg, so maybe they get reserved when you do
the "setserial." The 8250 driver has no idea that you disabled the
PNP device, so it would never release them. Then when you try to
activate it again, they're still in use. You can test this idea a
little bit by looking at /proc/ioports (1) immediately after boot, (2)
before "setserial", (3) after "setserial", and (4) after you disable
the PNP device.
I attached an experimental patch that add PNP4972 to the 8250_pnp
driver and tries to automatically activate devices. Can you give it a
try (with "pnp.debug=1")?
Thanks,
Bjorn
[-- Attachment #2: intermec-uart --]
[-- Type: application/octet-stream, Size: 1471 bytes --]
commit bd52383f8a4d465f833f479f4c21b220b36a84cf
Author: Bjorn Helgaas <bhelgaas@google.com>
Date: Thu Aug 11 13:06:42 2011 -0600
diff --git a/drivers/tty/serial/8250_pnp.c b/drivers/tty/serial/8250_pnp.c
index fc301f6..a2f2365 100644
--- a/drivers/tty/serial/8250_pnp.c
+++ b/drivers/tty/serial/8250_pnp.c
@@ -109,6 +109,9 @@ static const struct pnp_device_id pnp_dev_table[] = {
/* IBM */
/* IBM Thinkpad 701 Internal Modem Voice */
{ "IBM0033", 0 },
+ /* Intermec */
+ /* Intermec CV60 touchscreen port */
+ { "PNP4972", 0 },
/* Intertex */
/* Intertex 28k8 33k6 Voice EXT PnP */
{ "IXDC801", 0 },
commit b53ada9898ec8afb14a5b7f8e66066979b97f946
Author: Bjorn Helgaas <bhelgaas@google.com>
Date: Thu Aug 11 13:10:31 2011 -0600
diff --git a/drivers/pnp/pnpacpi/core.c b/drivers/pnp/pnpacpi/core.c
index ca84d50..6687711 100644
--- a/drivers/pnp/pnpacpi/core.c
+++ b/drivers/pnp/pnpacpi/core.c
@@ -280,11 +280,16 @@ static int __init pnpacpi_add_device(struct acpi_device *device)
else
strncpy(dev->name, acpi_device_bid(device), sizeof(dev->name));
+ if (dev->capabilities & PNP_CONFIGURABLE)
+ pnpacpi_parse_resource_option_data(dev);
+
if (dev->active)
pnpacpi_parse_allocated_resource(dev);
+ else
+ pnp_auto_config_dev(dev);
if (dev->capabilities & PNP_CONFIGURABLE)
- pnpacpi_parse_resource_option_data(dev);
+ pnpacpi_set_resources(dev);
list_for_each_entry(id, &device->pnp.ids, list) {
if (!strcmp(id->id, pnpid))
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: How to access serial port that is set in BIOS as OS Controlled
@ 2011-08-12 7:01 Jeff Chua
2011-08-12 18:07 ` Bjorn Helgaas
0 siblings, 1 reply; 10+ messages in thread
From: Jeff Chua @ 2011-08-12 7:01 UTC (permalink / raw)
To: Bjorn Helgaas; +Cc: Andrey Panin, lkml, Matthew Garrett
On Fri, Aug 12, 2011 at 5:49 AM, Bjorn Helgaas <bhelgaas@google.com>
wrote:
> Oops, my mistake. You now need "pnp.debug=1" to turn the extra debug
Now, I do see more messages and "resources" show "active" ...
# dmesg
pnp 00:00: parse allocated resources
pnp 00:01: parse allocated resources
pnp 00:01: PNP0c02: calling 0xc11c8a0c
pnp 00:02: parse allocated resources
pnp 00:02: PNP0c02: calling 0xc11c8a0c
pnp 00:03: parse allocated resources
pnp 00:04: parse allocated resources
pnp 00:05: parse allocated resources
pnp 00:06: parse allocated resources
pnp 00:07: parse allocated resources
pnp 00:08: parse resource options
pnp 00:08: dependent set 0 (acceptable) io min 0x3f8 max 0x3f8 align
1 size 8 flags 0x1
pnp 00:08: dependent set 0 (acceptable) irq 4 flags 0x1
pnp 00:08: parse allocated resources
pnp 00:08: set resources
pnp 00:09: parse resource options
pnp 00:09: dependent set 0 (acceptable) io min 0x2f8 max 0x2f8 align
1 size 8 flags 0x1
pnp 00:09: dependent set 0 (acceptable) irq 3 flags 0x1
pnp 00:09: parse allocated resources
pnp 00:09: set resources
pnp 00:0a: parse resource options
pnp 00:0a: dependent set 0 (acceptable) io min 0x3e8 max 0x3e8 align
pnp 00:0a: dependent set 0 (acceptable) irq 6 flags 0x1
pnp 00:0a: pnp_assign_resources, try dependent set 0
pnp 00:0a: pnp_assign_resources succeeded: current resources:
pnp 00:0a: [io 0x03e8-0x03ef flags 0x40000101]
pnp 00:0a: dependent set 0 (acceptable) irq 6 flags 0x1
pnp 00:0a: pnp_assign_resources, try dependent set 0
pnp 00:0a: pnp_assign_resources succeeded: current resources:
pnp 00:0a: [io 0x03e8-0x03ef flags 0x40000101]
pnp 00:0a: [irq 6 flags 0x40000401]
pnp 00:0a: set resources
pnp 00:0b: parse resource options
pnp 00:0b: dependent set 0 (acceptable) io min 0x2e8 max 0x2e8 align
1 size 8 flags 0x1
pnp 00:0b: dependent set 0 (acceptable) irq 12 flags 0x1
pnp 00:0b: parse allocated resources
pnp 00:0b: set resources
serial 00:0a: pnp_assign_resources, try dependent set 0
serial 00:0a: pnp_assign_resources succeeded: current resources:
serial 00:0a: [io 0x03e8-0x03ef flags 0x40000101]
serial 00:0a: [irq 6 flags 0x40000401]
serial 00:0a: pnp_start_dev: current resources:
serial 00:0a: [io 0x03e8-0x03ef flags 0x40000101]
serial 00:0a: [irq 6 flags 0x40000401]
serial 00:0a: set resources
serial 00:0a: encode 2 resources
serial 00:0a: encode io 0x3e8-0x3ef decode 0x1
serial 00:0a: encode irq 6 edge high exclusive (2-byte descriptor)
# cat /sys/bus/pnp/devices/00:0a/resources
state = active
io 0x3e8-0x3ef
irq 6
# setserial /dev/ttyS2
/dev/ttyS2, UART: 16550A, Port: 0x03e8, IRQ: 6
# echo activate > /sys/bus/pnp/devices/00:0a/resources
-bash: echo: write error: Device or resource busy
# dmesg
serial 00:0a: in use; can't configure
serial 00:0a: in use; can't configure
# echo disable > /sys/bus/pnp/devices/00:0a/resources
-bash: echo: write error: Device or resource busy
# dmesg
serial 00:0a: in use; can't configure
serial 00:0a: in use; can't configure
> This *should* work. My guess is that it's failing because the I/O ports
> at 0x3e8 are still reserved. The PNP core doesn't actually reserve
> anything, so it would have to be the 8250 driver. It doesn't mention
> those ports in dmesg, so maybe they get reserved when you do the
> "setserial."
It's working better now. But, the port is now always active and can't be
disabled.
> The 8250 driver has no idea that you disabled the PNP device, so it
> would never release them. Then when you try to activate it again,
> they're still in use. You can test this idea a little bit by looking at
> /proc/ioports (1) immediately after boot, (2) before "setserial", (3)
> after "setserial", and (4) after you disable the PNP device.
It always shows the same info, except I can't disable the port.
# cat /proc/ioports
03e8-03ef : serial
Thanks,
Jeff
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: How to access serial port that is set in BIOS as OS Controlled
2011-08-12 7:01 Jeff Chua
@ 2011-08-12 18:07 ` Bjorn Helgaas
0 siblings, 0 replies; 10+ messages in thread
From: Bjorn Helgaas @ 2011-08-12 18:07 UTC (permalink / raw)
To: Jeff Chua; +Cc: Andrey Panin, lkml, Matthew Garrett
On Fri, Aug 12, 2011 at 1:01 AM, Jeff Chua <jeff.chua.linux@gmail.com> wrote:
>
>
> On Fri, Aug 12, 2011 at 5:49 AM, Bjorn Helgaas <bhelgaas@google.com> wrote:
>
>> Oops, my mistake. You now need "pnp.debug=1" to turn the extra debug
>
> Now, I do see more messages and "resources" show "active" ...
>
>
> # dmesg
> pnp 00:00: parse allocated resources
> pnp 00:01: parse allocated resources
> pnp 00:01: PNP0c02: calling 0xc11c8a0c
> pnp 00:02: parse allocated resources
> pnp 00:02: PNP0c02: calling 0xc11c8a0c
> pnp 00:03: parse allocated resources
> pnp 00:04: parse allocated resources
> pnp 00:05: parse allocated resources
> pnp 00:06: parse allocated resources
> pnp 00:07: parse allocated resources
> pnp 00:08: parse resource options
> pnp 00:08: dependent set 0 (acceptable) io min 0x3f8 max 0x3f8 align 1
> size 8 flags 0x1
> pnp 00:08: dependent set 0 (acceptable) irq 4 flags 0x1
> pnp 00:08: parse allocated resources
> pnp 00:08: set resources
> pnp 00:09: parse resource options
> pnp 00:09: dependent set 0 (acceptable) io min 0x2f8 max 0x2f8 align 1
> size 8 flags 0x1
> pnp 00:09: dependent set 0 (acceptable) irq 3 flags 0x1
> pnp 00:09: parse allocated resources
> pnp 00:09: set resources
> pnp 00:0a: parse resource options
> pnp 00:0a: dependent set 0 (acceptable) io min 0x3e8 max 0x3e8 align pnp
> 00:0a: dependent set 0 (acceptable) irq 6 flags 0x1
> pnp 00:0a: pnp_assign_resources, try dependent set 0
> pnp 00:0a: pnp_assign_resources succeeded: current resources:
> pnp 00:0a: [io 0x03e8-0x03ef flags 0x40000101]
> pnp 00:0a: dependent set 0 (acceptable) irq 6 flags 0x1
> pnp 00:0a: pnp_assign_resources, try dependent set 0
> pnp 00:0a: pnp_assign_resources succeeded: current resources:
> pnp 00:0a: [io 0x03e8-0x03ef flags 0x40000101]
> pnp 00:0a: [irq 6 flags 0x40000401]
> pnp 00:0a: set resources
> pnp 00:0b: parse resource options
> pnp 00:0b: dependent set 0 (acceptable) io min 0x2e8 max 0x2e8 align 1
> size 8 flags 0x1
> pnp 00:0b: dependent set 0 (acceptable) irq 12 flags 0x1
> pnp 00:0b: parse allocated resources
> pnp 00:0b: set resources
> serial 00:0a: pnp_assign_resources, try dependent set 0
> serial 00:0a: pnp_assign_resources succeeded: current resources:
> serial 00:0a: [io 0x03e8-0x03ef flags 0x40000101]
> serial 00:0a: [irq 6 flags 0x40000401]
> serial 00:0a: pnp_start_dev: current resources:
> serial 00:0a: [io 0x03e8-0x03ef flags 0x40000101]
> serial 00:0a: [irq 6 flags 0x40000401]
> serial 00:0a: set resources
> serial 00:0a: encode 2 resources
> serial 00:0a: encode io 0x3e8-0x3ef decode 0x1
> serial 00:0a: encode irq 6 edge high exclusive (2-byte descriptor)
>
>
> # cat /sys/bus/pnp/devices/00:0a/resources
> state = active
> io 0x3e8-0x3ef
> irq 6
>
>
> # setserial /dev/ttyS2
> /dev/ttyS2, UART: 16550A, Port: 0x03e8, IRQ: 6
>
>
> # echo activate > /sys/bus/pnp/devices/00:0a/resources
> -bash: echo: write error: Device or resource busy
>
> # dmesg
> serial 00:0a: in use; can't configure
> serial 00:0a: in use; can't configure
>
>
> # echo disable > /sys/bus/pnp/devices/00:0a/resources
> -bash: echo: write error: Device or resource busy
>
> # dmesg
> serial 00:0a: in use; can't configure
> serial 00:0a: in use; can't configure
>
>
>> This *should* work. My guess is that it's failing because the I/O ports
>> at 0x3e8 are still reserved. The PNP core doesn't actually reserve
>> anything, so it would have to be the 8250 driver. It doesn't mention those
>> ports in dmesg, so maybe they get reserved when you do the "setserial."
>
> It's working better now. But, the port is now always active and can't be
> disabled.
>
>
>> The 8250 driver has no idea that you disabled the PNP device, so it would
>> never release them. Then when you try to activate it again, they're still
>> in use. You can test this idea a little bit by looking at /proc/ioports (1)
>> immediately after boot, (2) before "setserial", (3) after "setserial", and
>> (4) after you disable the PNP device.
>
> It always shows the same info, except I can't disable the port.
>
> # cat /proc/ioports
> 03e8-03ef : serial
Thanks for testing this.
I think this is all working as expected now. PNP automatically
configures the port and enables it. The 8250_pnp driver automatically
claims it. And I assume the port "just works" without any setserial
or sysfs manipulations at all. Does that solve your issue?
You can't activate or disable the device via
/sys/bus/pnp/devices/00:0a/resources because a driver (8250_pnp) is
attached to it and PNP won't let you change a device out from under
the driver (this test is in pnp_set_current_resources()).
If you really need to be able to disable the device, you would have to
detach 8250_pnp first, probably using the sysfs unbind file as
described here: http://lwn.net/Articles/143397/.
We need to think a bit more about whether this the right approach for
handling _SRS and whether it's in the right place. But I think this
is a start, at least.
Bjorn
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: How to access serial port that is set in BIOS as OS Controlled
@ 2011-08-12 21:59 Jeff Chua
0 siblings, 0 replies; 10+ messages in thread
From: Jeff Chua @ 2011-08-12 21:59 UTC (permalink / raw)
To: Bjorn Helgaas; +Cc: Andrey Panin, lkml, Matthew Garrett, Linus Torvalds
On Sat, Aug 13, 2011 at 2:07 AM, Bjorn Helgaas <bhelgaas@google.com>
wrote:
> On Fri, Aug 12, 2011 at 1:01 AM, Jeff Chua <jeff.chua.linux@gmail.com>
wrote:
> I think this is all working as expected now. PNP automatically
> configures the port and enables it. The 8250_pnp driver automatically
> claims it. And I assume the port "just works" without any setserial or
> sysfs manipulations at all. Does that solve your issue?
Yes, it solved my issue:) Big thanks to you!
> We need to think a bit more about whether this the right approach for
> handling _SRS and whether it's in the right place. But I think this is
> a start, at least.
Agreed.
Please push the patch to Linus so he can include it to his tree to solve
os-controlled devices so they can automatically be used under Linux.
Thank you Andrey and Bjorn for helping out!
Thanks,
Jeff
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2011-08-12 21:59 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-07-28 5:43 How to access serial port that is set in BIOS as OS Controlled Jeff Chua
2011-08-04 10:56 ` Andrey Panin
2011-08-04 17:39 ` Bjorn Helgaas
[not found] ` <CAAJw_ZvZEn0qVG3JVfEWFQbOSjVUCJhBwQ2Dw5KQyDx2kY4xbA@mail.gmail.com>
2011-08-05 15:20 ` Bjorn Helgaas
[not found] ` <CAAJw_ZvxQQ9-QrSiv9-Y4yCun4W0xvAD3OcdL8gS_hN9FE1rkQ@mail.gmail.com>
2011-08-10 16:46 ` Bjorn Helgaas
2011-08-11 9:07 Jeff Chua
2011-08-11 21:49 ` Bjorn Helgaas
2011-08-12 7:01 Jeff Chua
2011-08-12 18:07 ` Bjorn Helgaas
2011-08-12 21:59 Jeff Chua
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®