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From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Keith Packard <keithp@keithp.com>
Cc: Dave Airlie <airlied@redhat.com>,
	intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 1/4] drm/i915: Wait for LVDS panel power sequence
Date: Mon, 8 Aug 2011 09:27:19 -0700	[thread overview]
Message-ID: <20110808092719.4f62983d@jbarnes-desktop> (raw)
In-Reply-To: <1312653248-3487-2-git-send-email-keithp@keithp.com>

On Sat,  6 Aug 2011 10:54:05 -0700
Keith Packard <keithp@keithp.com> wrote:

> During mode setting, check to make sure the panel power sequencing has
> completed before doing further operations on the device. This
> uncovered errors with DPMS not turning the device off as it was left locked.
> 
> Signed-off-by: Keith Packard <keithp@keithp.com>
> ---
>  drivers/gpu/drm/i915/intel_lvds.c |   13 +++++++++++--
>  1 files changed, 11 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
> index 2e8ddfc..6985e42 100644
> --- a/drivers/gpu/drm/i915/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/intel_lvds.c
> @@ -72,14 +72,16 @@ static void intel_lvds_enable(struct intel_lvds *intel_lvds)
>  {
>  	struct drm_device *dev = intel_lvds->base.base.dev;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
> -	u32 ctl_reg, lvds_reg;
> +	u32 ctl_reg, lvds_reg, stat_reg;
>  
>  	if (HAS_PCH_SPLIT(dev)) {
>  		ctl_reg = PCH_PP_CONTROL;
>  		lvds_reg = PCH_LVDS;
> +		stat_reg = PCH_PP_STATUS;
>  	} else {
>  		ctl_reg = PP_CONTROL;
>  		lvds_reg = LVDS;
> +		stat_reg = PP_STATUS;
>  	}
>  
>  	I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
> @@ -105,6 +107,8 @@ static void intel_lvds_enable(struct intel_lvds *intel_lvds)
>  
>  	I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
>  	POSTING_READ(lvds_reg);
> +	if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
> +		DRM_ERROR("timed out waiting for panel to power on\n");

Looks like maybe we want a small function for this...

>  	I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
> +	if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
> +		DRM_ERROR("timed out waiting for panel to power off status 0x%08x control 0x%08x\n",
> +			  I915_READ(PCH_PP_STATUS), I915_READ(PCH_PP_CONTROL));

...to catch places like this where the wrong register gets used. :)


-- 
Jesse Barnes, Intel Open Source Technology Center

  reply	other threads:[~2011-08-08 16:27 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-08-06 17:54 drm/i915: Disabling unused outputs on CPT is broken Keith Packard
2011-08-06 17:54 ` [PATCH 1/4] drm/i915: Wait for LVDS panel power sequence Keith Packard
2011-08-08 16:27   ` Jesse Barnes [this message]
2011-08-08 18:40     ` [Intel-gfx] " Keith Packard
2011-08-08 18:50       ` Jesse Barnes
2011-08-06 17:54 ` [PATCH 2/4] drm/i915: Leave LVDS registers unlocked Keith Packard
2011-08-08 16:30   ` [Intel-gfx] " Jesse Barnes
2011-08-08 18:25     ` Keith Packard
2011-08-08 18:42     ` Keith Packard
2011-08-08 18:49       ` Jesse Barnes
2011-08-08 19:53         ` Keith Packard
2011-08-08 20:01           ` Jesse Barnes
2011-08-08 20:24             ` Keith Packard
2011-08-08 20:25               ` Jesse Barnes
2011-08-06 17:54 ` [PATCH 3/4] drm/i915: Fix PCH port pipe select in CPT disable paths Keith Packard
2011-08-08 16:31   ` [Intel-gfx] " Jesse Barnes
2011-08-06 17:54 ` [PATCH 4/4] drm/i915: Remove unused 'reg' argument to dp_pipe_enabled Keith Packard
2011-08-08 16:32   ` [Intel-gfx] " Jesse Barnes

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