* Re: [PATCH v2] x86/PCI: use host bridge _CRS info on ASUS M2V-MX SE
@ 2011-09-20 10:20 Paul Menzel
2011-09-20 16:39 ` Bjorn Helgaas
0 siblings, 1 reply; 8+ messages in thread
From: Paul Menzel @ 2011-09-20 10:20 UTC (permalink / raw)
To: x86, linux-pci
Cc: Bjorn Helgaas, stable, linux-kernel, Thomas Gleixner,
Ingo Molnar, H. Peter Anvin, Jesse Barnes
[-- Attachment #1: Type: text/plain, Size: 7186 bytes --]
Date: Wed, 31 Aug 2011 17:07:10 +0200
With commit 3e3da00c
commit 3e3da00c01d050307e753fb7b3e84aefc16da0d0
Author: Yinghai Lu <yinghai@kernel.org>
Date: Wed Feb 10 01:20:09 2010 -0800
x86/pci: AMD one chain system to use pci read out res
Linux gives the following oops.
[…]
[ 41.265636] parport0: PC-style at 0x378, irq 7 [PCSPP,TRISTATE]
[ 41.680357] HDA Intel 0000:20:01.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17
[ 41.680444] HDA Intel 0000:20:01.0: setting latency timer to 64
[ 41.680462] BUG: unable to handle kernel paging request at ffffc90011c08000
[ 41.680617] IP: [<ffffffffa0578402>] azx_probe+0x3ad/0x86b [snd_hda_intel]
[ 41.680728] PGD 13781a067 PUD 13781b067 PMD 1300ba067 PTE 800000fd00000173
[ 41.680956] Oops: 0009 [#1] SMP
[ 41.681098] last sysfs file: /sys/module/snd_pcm/initstate
[ 41.681159] CPU 0
[ 41.681203] Modules linked in: snd_hda_intel(+) snd_hda_codec snd_hwdep snd_pcm_oss snd_mixer_oss snd_pcm snd_seq_midi snd_rawmidi snd_seq_midi_event tpm_tis tpm snd_seq tpm_bios psmouse parport_pc snd_timer snd_seq_device parport processor evdev snd i2c_viapro thermal_sys amd64_edac_mod k8temp i2c_core soundcore shpchp pcspkr serio_raw asus_atk0110 pci_hotplug edac_core button snd_page_alloc edac_mce_amd ext3 jbd mbcache sha256_generic cryptd aes_x86_64 aes_generic cbc dm_crypt dm_mod raid1 md_mod usbhid hid sg sd_mod crc_t10dif sr_mod cdrom ata_generic uhci_hcd sata_via pata_via libata ehci_hcd usbcore scsi_mod via_rhine mii nls_base [last unloaded: scsi_wait_scan]
[ 41.684180]
[ 41.684180] Pid: 1153, comm: work_for_cpu Not tainted 2.6.37-1-amd64 #1 M2V-MX SE/System Product Name
[ 41.684180] RIP: 0010:[<ffffffffa0578402>] [<ffffffffa0578402>] azx_probe+0x3ad/0x86b [snd_hda_intel]
[ 41.684180] RSP: 0018:ffff88013153fe50 EFLAGS: 00010286
[ 41.684180] RAX: ffffc90011c08000 RBX: ffff88013029ec00 RCX: 0000000000000006
[ 41.684180] RDX: 0000000000000000 RSI: 0000000000000246 RDI: 0000000000000246
[ 41.684180] RBP: ffff88013341d000 R08: 0000000000000000 R09: 0000000000000040
[ 41.684180] R10: 0000000000000286 R11: 0000000000003731 R12: ffff88013029c400
[ 41.684180] R13: 0000000000000000 R14: 0000000000000000 R15: ffff88013341d090
[ 41.684180] FS: 0000000000000000(0000) GS:ffff8800bfc00000(0000) knlGS:00000000f7610ab0
[ 41.684180] CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b
[ 41.684180] CR2: ffffc90011c08000 CR3: 0000000132f57000 CR4: 00000000000006f0
[ 41.684180] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
[ 41.684180] DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
[ 41.684180] Process work_for_cpu (pid: 1153, threadinfo ffff88013153e000, task ffff8801303c86c0)
[ 41.684180] Stack:
[ 41.684180] 0000000000000005 ffffffff8123ad65 00000000000136c0 ffff88013029c400
[ 41.684180] ffff8801303c8998 ffff88013341d000 ffff88013341d090 ffff8801322d9dc8
[ 41.684180] ffff88013341d208 0000000000000000 0000000000000000 ffffffff811ad232
[ 41.684180] Call Trace:
[ 41.684180] [<ffffffff8123ad65>] ? __pm_runtime_set_status+0x162/0x186
[ 41.684180] [<ffffffff811ad232>] ? local_pci_probe+0x49/0x92
[ 41.684180] [<ffffffff8105afc5>] ? do_work_for_cpu+0x0/0x1b
[ 41.684180] [<ffffffff8105afc5>] ? do_work_for_cpu+0x0/0x1b
[ 41.684180] [<ffffffff8105afd0>] ? do_work_for_cpu+0xb/0x1b
[ 41.684180] [<ffffffff8105fd3f>] ? kthread+0x7a/0x82
[ 41.684180] [<ffffffff8100a824>] ? kernel_thread_helper+0x4/0x10
[ 41.684180] [<ffffffff8105fcc5>] ? kthread+0x0/0x82
[ 41.684180] [<ffffffff8100a820>] ? kernel_thread_helper+0x0/0x10
[ 41.684180] Code: f4 01 00 00 ef 31 f6 48 89 df e8 29 dd ff ff 85 c0 0f 88 2b 03 00 00 48 89 ef e8 b4 39 c3 e0 8b 7b 40 e8 fc 9d b1 e0 48 8b 43 38 <66> 8b 10 66 89 14 24 8b 43 14 83 e8 03 83 f8 01 77 32 31 d2 be
[ 41.684180] RIP [<ffffffffa0578402>] azx_probe+0x3ad/0x86b [snd_hda_intel]
[ 41.684180] RSP <ffff88013153fe50>
[ 41.684180] CR2: ffffc90011c08000
[ 41.684180] ---[ end trace 8d1f3ebc136437fd ]---
[…]
Trusting the ACPI _CRS information (`pci=use_crs`) fixes this problem.
$ dmesg | grep -i crs # with the quirk
[ 0.153559] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
The match has to be against the DMI board entries though since the vendor entries are not populated.
[ 0.000000] DMI: System manufacturer System Product Name/M2V-MX SE, BIOS 0304 10/30/2007
This quirk should be removed when `pci=use_crs` is enabled for machines from 2006 or earlier or some other solution is implemented.
Using coreboot [1] with this board the problem does not exist but this quirk also does not affect it either. To be safe though the check is tightened to only take effect when the BIOS from American Megatrends is used.
15:13 < ruik> but coreboot does not need that
15:13 < ruik> because i have there only one root bus
15:13 < ruik> the audio is behind a bridge
$ sudo dmidecode
[…]
BIOS Information
Vendor: American Megatrends Inc.
Version: 0304
Release Date: 10/30/2007
[…]
[1] http://www.coreboot.org/
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=30552
CC: stable@kernel.org (≥ 2.6.34)
CC: Bjorn Helgaas <bhelgaas@google.com>
CC: Thomas Gleixner <tglx@linutronix.de>
CC: Ingo Molnar <mingo@redhat.com>
CC: H. Peter Anvin <hpa@zytor.com>
CC: x86@kernel.org
CC: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
---
Bjorn is working on a real fix. But until he has time and this gets in it would be great to get this quirk in right now.
v2:
• update commit message
• use Bjorn’s current address
• send to x86 in addition to linux-pci
---
arch/x86/pci/acpi.c | 11 +++++++++++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index ae3cb23..ff23d17 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -43,6 +43,17 @@ static const struct dmi_system_id pci_use_crs_table[] __initconst = {
DMI_MATCH(DMI_PRODUCT_NAME, "ALiveSATA2-GLAN"),
},
},
+ /* https://bugzilla.kernel.org/show_bug.cgi?id=30552 */
+ /* 2006 AMD HT/VIA system with two host bridges */
+ {
+ .callback = set_use_crs,
+ .ident = "ASUS M2V-MX SE",
+ .matches = {
+ DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+ DMI_MATCH(DMI_BOARD_NAME, "M2V-MX SE"),
+ DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
+ },
+ },
{}
};
--
1.7.6.3
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 198 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2] x86/PCI: use host bridge _CRS info on ASUS M2V-MX SE
2011-09-20 10:20 [PATCH v2] x86/PCI: use host bridge _CRS info on ASUS M2V-MX SE Paul Menzel
@ 2011-09-20 16:39 ` Bjorn Helgaas
2011-09-27 9:39 ` Paul Menzel
0 siblings, 1 reply; 8+ messages in thread
From: Bjorn Helgaas @ 2011-09-20 16:39 UTC (permalink / raw)
To: Paul Menzel
Cc: x86, linux-pci, stable, linux-kernel, Thomas Gleixner,
Ingo Molnar, H. Peter Anvin, Jesse Barnes
On Tue, Sep 20, 2011 at 4:20 AM, Paul Menzel
<paulepanter@users.sourceforge.net> wrote:
> ...
>
> Using coreboot [1] with this board the problem does not exist but this quirk also does not affect it either. To be safe though the check is tightened to only take effect when the BIOS from American Megatrends is used.
>
> 15:13 < ruik> but coreboot does not need that
> 15:13 < ruik> because i have there only one root bus
> 15:13 < ruik> the audio is behind a bridge
I'd like to know more about this coreboot situation. Would it be
possible to get a dmesg log from the system with coreboot? I'd like
to see how coreboot configures this device differently.
> CC: stable@kernel.org (≥ 2.6.34)
> CC: Bjorn Helgaas <bhelgaas@google.com>
> CC: Thomas Gleixner <tglx@linutronix.de>
> CC: Ingo Molnar <mingo@redhat.com>
> CC: H. Peter Anvin <hpa@zytor.com>
> CC: x86@kernel.org
> CC: Jesse Barnes <jbarnes@virtuousgeek.org>
> Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This is fine with me. I don't think it's the final solution, but I
think it's worth doing for now.
Bjorn
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2] x86/PCI: use host bridge _CRS info on ASUS M2V-MX SE
2011-09-20 16:39 ` Bjorn Helgaas
@ 2011-09-27 9:39 ` Paul Menzel
2011-09-27 14:09 ` Bjorn Helgaas
0 siblings, 1 reply; 8+ messages in thread
From: Paul Menzel @ 2011-09-27 9:39 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: x86, linux-pci, stable, linux-kernel, Thomas Gleixner,
Ingo Molnar, H. Peter Anvin, Jesse Barnes
[-- Attachment #1: Type: text/plain, Size: 1719 bytes --]
Am Dienstag, den 20.09.2011, 10:39 -0600 schrieb Bjorn Helgaas:
> On Tue, Sep 20, 2011 at 4:20 AM, Paul Menzel wrote:
> > ...
> >
> > Using coreboot [1] with this board the problem does not exist but this quirk also does not affect it either. To be safe though the check is tightened to only take effect when the BIOS from American Megatrends is used.
> >
> > 15:13 < ruik> but coreboot does not need that
> > 15:13 < ruik> because i have there only one root bus
> > 15:13 < ruik> the audio is behind a bridge
>
> I'd like to know more about this coreboot situation. Would it be
> possible to get a dmesg log from the system with coreboot? I'd like
> to see how coreboot configures this device differently.
I had attached that to the Bugzilla report #30552 [2], but this is down
at the moment. I saw that you got the output from someone on #coreboot
though.
> > CC: stable@kernel.org (≥ 2.6.34)
> > CC: Bjorn Helgaas <bhelgaas@google.com>
> > CC: Thomas Gleixner <tglx@linutronix.de>
> > CC: Ingo Molnar <mingo@redhat.com>
> > CC: H. Peter Anvin <hpa@zytor.com>
> > CC: x86@kernel.org
> > CC: Jesse Barnes <jbarnes@virtuousgeek.org>
> > Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
>
> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
>
> This is fine with me. I don't think it's the final solution, but I
> think it's worth doing for now.
Thank you. I could not see this in Linus’ tree [3] yet. Jesse, could you
pick that up as you have done for the other commit? (Where is your
(temporary) tree located?)
Thanks,
Paul
[2] https://bugzilla.kernel.org/show_bug.cgi?id=30552
[3] https://github.com/torvalds/linux.git
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 198 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2] x86/PCI: use host bridge _CRS info on ASUS M2V-MX SE
2011-09-27 9:39 ` Paul Menzel
@ 2011-09-27 14:09 ` Bjorn Helgaas
2011-10-04 14:37 ` Paul Menzel
0 siblings, 1 reply; 8+ messages in thread
From: Bjorn Helgaas @ 2011-09-27 14:09 UTC (permalink / raw)
To: Paul Menzel
Cc: x86, linux-pci, stable, linux-kernel, Thomas Gleixner,
Ingo Molnar, H. Peter Anvin, Jesse Barnes
On Tue, Sep 27, 2011 at 3:39 AM, Paul Menzel
<paulepanter@users.sourceforge.net> wrote:
> Am Dienstag, den 20.09.2011, 10:39 -0600 schrieb Bjorn Helgaas:
>> On Tue, Sep 20, 2011 at 4:20 AM, Paul Menzel wrote:
>> > ...
>> >
>> > Using coreboot [1] with this board the problem does not exist but this quirk also does not affect it either. To be safe though the check is tightened to only take effect when the BIOS from American Megatrends is used.
>> >
>> > 15:13 < ruik> but coreboot does not need that
>> > 15:13 < ruik> because i have there only one root bus
>> > 15:13 < ruik> the audio is behind a bridge
>>
>> I'd like to know more about this coreboot situation. Would it be
>> possible to get a dmesg log from the system with coreboot? I'd like
>> to see how coreboot configures this device differently.
>
> I had attached that to the Bugzilla report #30552 [2], but this is down
> at the moment. I saw that you got the output from someone on #coreboot
> though.
>
>> > CC: stable@kernel.org (≥ 2.6.34)
>> > CC: Bjorn Helgaas <bhelgaas@google.com>
>> > CC: Thomas Gleixner <tglx@linutronix.de>
>> > CC: Ingo Molnar <mingo@redhat.com>
>> > CC: H. Peter Anvin <hpa@zytor.com>
>> > CC: x86@kernel.org
>> > CC: Jesse Barnes <jbarnes@virtuousgeek.org>
>> > Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
>>
>> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
>>
>> This is fine with me. I don't think it's the final solution, but I
>> think it's worth doing for now.
>
> Thank you. I could not see this in Linus’ tree [3] yet. Jesse, could you
> pick that up as you have done for the other commit? (Where is your
> (temporary) tree located?)
Jesse's on vacation right now. I'm in the middle of setting up a
temporary tree for the interim.
Bjorn
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2] x86/PCI: use host bridge _CRS info on ASUS M2V-MX SE
2011-09-27 14:09 ` Bjorn Helgaas
@ 2011-10-04 14:37 ` Paul Menzel
2011-10-04 15:03 ` Bjorn Helgaas
2011-10-06 15:14 ` Jesse Barnes
0 siblings, 2 replies; 8+ messages in thread
From: Paul Menzel @ 2011-10-04 14:37 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: x86, linux-pci, stable, linux-kernel, Thomas Gleixner,
Ingo Molnar, H. Peter Anvin, Jesse Barnes
[-- Attachment #1: Type: text/plain, Size: 2154 bytes --]
Am Dienstag, den 27.09.2011, 08:09 -0600 schrieb Bjorn Helgaas:
> On Tue, Sep 27, 2011 at 3:39 AM, Paul Menzel wrote:
> > Am Dienstag, den 20.09.2011, 10:39 -0600 schrieb Bjorn Helgaas:
> >> On Tue, Sep 20, 2011 at 4:20 AM, Paul Menzel wrote:
> >> > ...
> >> >
> >> > Using coreboot [1] with this board the problem does not exist but this quirk also does not affect it either. To be safe though the check is tightened to only take effect when the BIOS from American Megatrends is used.
> >> >
> >> > 15:13 < ruik> but coreboot does not need that
> >> > 15:13 < ruik> because i have there only one root bus
> >> > 15:13 < ruik> the audio is behind a bridge
> >>
> >> I'd like to know more about this coreboot situation. Would it be
> >> possible to get a dmesg log from the system with coreboot? I'd like
> >> to see how coreboot configures this device differently.
> >
> > I had attached that to the Bugzilla report #30552 [2], but this is down
> > at the moment. I saw that you got the output from someone on #coreboot
> > though.
> >
> >> > CC: stable@kernel.org (≥ 2.6.34)
> >> > CC: Bjorn Helgaas <bhelgaas@google.com>
> >> > CC: Thomas Gleixner <tglx@linutronix.de>
> >> > CC: Ingo Molnar <mingo@redhat.com>
> >> > CC: H. Peter Anvin <hpa@zytor.com>
> >> > CC: x86@kernel.org
> >> > CC: Jesse Barnes <jbarnes@virtuousgeek.org>
> >> > Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
> >>
> >> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> >>
> >> This is fine with me. I don't think it's the final solution, but I
> >> think it's worth doing for now.
> >
> > Thank you. I could not see this in Linus’ tree [3] yet. Jesse, could you
> > pick that up as you have done for the other commit? (Where is your
> > (temporary) tree located?)
>
> Jesse's on vacation right now.
It looks like Jesse is back from vacation. Jesse, I hope you could enjoy
it and I am sorry for bothering you right after you have been back.
Is it possible to get this patch in for Linux 3.1?
> I'm in the middle of setting up a temporary tree for the interim.
Thanks,
Paul
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 198 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2] x86/PCI: use host bridge _CRS info on ASUS M2V-MX SE
2011-10-04 14:37 ` Paul Menzel
@ 2011-10-04 15:03 ` Bjorn Helgaas
2011-10-06 15:14 ` Jesse Barnes
1 sibling, 0 replies; 8+ messages in thread
From: Bjorn Helgaas @ 2011-10-04 15:03 UTC (permalink / raw)
To: Paul Menzel
Cc: x86, linux-pci, stable, linux-kernel, Thomas Gleixner,
Ingo Molnar, H. Peter Anvin, Jesse Barnes
On Tue, Oct 4, 2011 at 8:37 AM, Paul Menzel
<paulepanter@users.sourceforge.net> wrote:
>
> Am Dienstag, den 27.09.2011, 08:09 -0600 schrieb Bjorn Helgaas:
> > On Tue, Sep 27, 2011 at 3:39 AM, Paul Menzel wrote:
> > > Am Dienstag, den 20.09.2011, 10:39 -0600 schrieb Bjorn Helgaas:
> > >> On Tue, Sep 20, 2011 at 4:20 AM, Paul Menzel wrote:
> > >> > ...
> > >> >
> > >> > Using coreboot [1] with this board the problem does not exist but this quirk also does not affect it either. To be safe though the check is tightened to only take effect when the BIOS from American Megatrends is used.
> > >> >
> > >> > 15:13 < ruik> but coreboot does not need that
> > >> > 15:13 < ruik> because i have there only one root bus
> > >> > 15:13 < ruik> the audio is behind a bridge
> > >>
> > >> I'd like to know more about this coreboot situation. Would it be
> > >> possible to get a dmesg log from the system with coreboot? I'd like
> > >> to see how coreboot configures this device differently.
> > >
> > > I had attached that to the Bugzilla report #30552 [2], but this is down
> > > at the moment. I saw that you got the output from someone on #coreboot
> > > though.
> > >
> > >> > CC: stable@kernel.org (≥ 2.6.34)
> > >> > CC: Bjorn Helgaas <bhelgaas@google.com>
> > >> > CC: Thomas Gleixner <tglx@linutronix.de>
> > >> > CC: Ingo Molnar <mingo@redhat.com>
> > >> > CC: H. Peter Anvin <hpa@zytor.com>
> > >> > CC: x86@kernel.org
> > >> > CC: Jesse Barnes <jbarnes@virtuousgeek.org>
> > >> > Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
> > >>
> > >> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> > >>
> > >> This is fine with me. I don't think it's the final solution, but I
> > >> think it's worth doing for now.
> > >
> > > Thank you. I could not see this in Linus’ tree [3] yet. Jesse, could you
> > > pick that up as you have done for the other commit? (Where is your
> > > (temporary) tree located?)
> >
> > Jesse's on vacation right now.
>
> It looks like Jesse is back from vacation. Jesse, I hope you could enjoy
> it and I am sorry for bothering you right after you have been back.
>
> Is it possible to get this patch in for Linux 3.1?
I mentioned this one to Jesse yesterday, but I'm sure he's busy
catching up after being out. I agree it'd be nice get it in for 3.1.
But it's awfully late in the cycle (my fault), it's been broken since
2.6.34 (3e3da00c), and there's an easy workaround ("pci=use_crs"), so
it's not a disaster if it goes in 3.2.
Bjorn
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2] x86/PCI: use host bridge _CRS info on ASUS M2V-MX SE
2011-10-04 14:37 ` Paul Menzel
2011-10-04 15:03 ` Bjorn Helgaas
@ 2011-10-06 15:14 ` Jesse Barnes
2011-10-06 22:14 ` [PATCH v3] " Paul Menzel
1 sibling, 1 reply; 8+ messages in thread
From: Jesse Barnes @ 2011-10-06 15:14 UTC (permalink / raw)
To: Paul Menzel
Cc: Bjorn Helgaas, x86, linux-pci, stable, linux-kernel,
Thomas Gleixner, Ingo Molnar, H. Peter Anvin
[-- Attachment #1: Type: text/plain, Size: 2471 bytes --]
On Tue, 04 Oct 2011 16:37:27 +0200
Paul Menzel <paulepanter@users.sourceforge.net> wrote:
> Am Dienstag, den 27.09.2011, 08:09 -0600 schrieb Bjorn Helgaas:
> > On Tue, Sep 27, 2011 at 3:39 AM, Paul Menzel wrote:
> > > Am Dienstag, den 20.09.2011, 10:39 -0600 schrieb Bjorn Helgaas:
> > >> On Tue, Sep 20, 2011 at 4:20 AM, Paul Menzel wrote:
> > >> > ...
> > >> >
> > >> > Using coreboot [1] with this board the problem does not exist but this quirk also does not affect it either. To be safe though the check is tightened to only take effect when the BIOS from American Megatrends is used.
> > >> >
> > >> > 15:13 < ruik> but coreboot does not need that
> > >> > 15:13 < ruik> because i have there only one root bus
> > >> > 15:13 < ruik> the audio is behind a bridge
> > >>
> > >> I'd like to know more about this coreboot situation. Would it be
> > >> possible to get a dmesg log from the system with coreboot? I'd like
> > >> to see how coreboot configures this device differently.
> > >
> > > I had attached that to the Bugzilla report #30552 [2], but this is down
> > > at the moment. I saw that you got the output from someone on #coreboot
> > > though.
> > >
> > >> > CC: stable@kernel.org (≥ 2.6.34)
> > >> > CC: Bjorn Helgaas <bhelgaas@google.com>
> > >> > CC: Thomas Gleixner <tglx@linutronix.de>
> > >> > CC: Ingo Molnar <mingo@redhat.com>
> > >> > CC: H. Peter Anvin <hpa@zytor.com>
> > >> > CC: x86@kernel.org
> > >> > CC: Jesse Barnes <jbarnes@virtuousgeek.org>
> > >> > Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
> > >>
> > >> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> > >>
> > >> This is fine with me. I don't think it's the final solution, but I
> > >> think it's worth doing for now.
> > >
> > > Thank you. I could not see this in Linus’ tree [3] yet. Jesse, could you
> > > pick that up as you have done for the other commit? (Where is your
> > > (temporary) tree located?)
> >
> > Jesse's on vacation right now.
>
> It looks like Jesse is back from vacation. Jesse, I hope you could enjoy
> it and I am sorry for bothering you right after you have been back.
>
> Is it possible to get this patch in for Linux 3.1?
Yeah looks safe. You'll have to send it straight to Linus though with
my ack; my tree isn't quite back up yet (have my new key signed so
maybe tomorrow).
Thanks,
--
Jesse Barnes, Intel Open Source Technology Center
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 836 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v3] x86/PCI: use host bridge _CRS info on ASUS M2V-MX SE
2011-10-06 15:14 ` Jesse Barnes
@ 2011-10-06 22:14 ` Paul Menzel
0 siblings, 0 replies; 8+ messages in thread
From: Paul Menzel @ 2011-10-06 22:14 UTC (permalink / raw)
To: Linus Torvalds
Cc: Jesse Barnes, Bjorn Helgaas, x86, linux-pci, stable,
linux-kernel, Thomas Gleixner, Ingo Molnar, H. Peter Anvin
[-- Attachment #1: Type: text/plain, Size: 8620 bytes --]
Am Donnerstag, den 06.10.2011, 08:14 -0700 schrieb Jesse Barnes:
> On Tue, 04 Oct 2011 16:37:27 +0200 Paul Menzel wrote:
[…]
> > Is it possible to get this patch in for Linux 3.1?
>
> Yeah looks safe. You'll have to send it straight to Linus though with
> my ack; my tree isn't quite back up yet (have my new key signed so
> maybe tomorrow).
Linus, could you please apply this patch (`git am --scissors …`)? The
whole discussion is available at [10] and this patch only effects the
ASUS M2V-MX SE with the vendor BIOS.
Thanks,
Paul
[10] http://thread.gmane.org/gmane.linux.kernel.pci/11809/focus=12000
----- 8< --------------------------- >8 -----
From: Paul Menzel <paulepanter@users.sourceforge.net>
Date: Wed, 31 Aug 2011 17:07:10 +0200
Subject: [PATCH] x86/PCI: use host bridge _CRS info on ASUS M2V-MX SE
In summary, this DMI quirk uses the _CRS info by default for the
ASUS M2V-MX SE by turning on `pci=use_crs` and is similar to the quirk
added by commit 2491762c whose commit message should be read for further
information.
commit 2491762cfb475dbdfa3db11ebea6de49f58b7fac
Author: Bjorn Helgaas <bjorn.helgaas@hp.com>
Date: Fri Jul 23 12:53:27 2010 -0600
x86/PCI: use host bridge _CRS info on ASRock ALiveSATA2-GLAN
The problem is with commit 3e3da00c
commit 3e3da00c01d050307e753fb7b3e84aefc16da0d0
Author: Yinghai Lu <yinghai@kernel.org>
Date: Wed Feb 10 01:20:09 2010 -0800
x86/pci: AMD one chain system to use pci read out res
Linux gives the following oops.
[…]
[ 41.265636] parport0: PC-style at 0x378, irq 7 [PCSPP,TRISTATE]
[ 41.680357] HDA Intel 0000:20:01.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17
[ 41.680444] HDA Intel 0000:20:01.0: setting latency timer to 64
[ 41.680462] BUG: unable to handle kernel paging request at ffffc90011c08000
[ 41.680617] IP: [<ffffffffa0578402>] azx_probe+0x3ad/0x86b [snd_hda_intel]
[ 41.680728] PGD 13781a067 PUD 13781b067 PMD 1300ba067 PTE 800000fd00000173
[ 41.680956] Oops: 0009 [#1] SMP
[ 41.681098] last sysfs file: /sys/module/snd_pcm/initstate
[ 41.681159] CPU 0
[ 41.681203] Modules linked in: snd_hda_intel(+) snd_hda_codec snd_hwdep snd_pcm_oss snd_mixer_oss snd_pcm snd_seq_midi snd_rawmidi snd_seq_midi_event tpm_tis tpm snd_seq tpm_bios psmouse parport_pc snd_timer snd_seq_device parport processor evdev snd i2c_viapro thermal_sys amd64_edac_mod k8temp i2c_core soundcore shpchp pcspkr serio_raw asus_atk0110 pci_hotplug edac_core button snd_page_alloc edac_mce_amd ext3 jbd mbcache sha256_generic cryptd aes_x86_64 aes_generic cbc dm_crypt dm_mod raid1 md_mod usbhid hid sg sd_mod crc_t10dif sr_mod cdrom ata_generic uhci_hcd sata_via pata_via libata ehci_hcd usbcore scsi_mod via_rhine mii nls_base [last unloaded: scsi_wait_scan]
[ 41.684180]
[ 41.684180] Pid: 1153, comm: work_for_cpu Not tainted 2.6.37-1-amd64 #1 M2V-MX SE/System Product Name
[ 41.684180] RIP: 0010:[<ffffffffa0578402>] [<ffffffffa0578402>] azx_probe+0x3ad/0x86b [snd_hda_intel]
[ 41.684180] RSP: 0018:ffff88013153fe50 EFLAGS: 00010286
[ 41.684180] RAX: ffffc90011c08000 RBX: ffff88013029ec00 RCX: 0000000000000006
[ 41.684180] RDX: 0000000000000000 RSI: 0000000000000246 RDI: 0000000000000246
[ 41.684180] RBP: ffff88013341d000 R08: 0000000000000000 R09: 0000000000000040
[ 41.684180] R10: 0000000000000286 R11: 0000000000003731 R12: ffff88013029c400
[ 41.684180] R13: 0000000000000000 R14: 0000000000000000 R15: ffff88013341d090
[ 41.684180] FS: 0000000000000000(0000) GS:ffff8800bfc00000(0000) knlGS:00000000f7610ab0
[ 41.684180] CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b
[ 41.684180] CR2: ffffc90011c08000 CR3: 0000000132f57000 CR4: 00000000000006f0
[ 41.684180] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
[ 41.684180] DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
[ 41.684180] Process work_for_cpu (pid: 1153, threadinfo ffff88013153e000, task ffff8801303c86c0)
[ 41.684180] Stack:
[ 41.684180] 0000000000000005 ffffffff8123ad65 00000000000136c0 ffff88013029c400
[ 41.684180] ffff8801303c8998 ffff88013341d000 ffff88013341d090 ffff8801322d9dc8
[ 41.684180] ffff88013341d208 0000000000000000 0000000000000000 ffffffff811ad232
[ 41.684180] Call Trace:
[ 41.684180] [<ffffffff8123ad65>] ? __pm_runtime_set_status+0x162/0x186
[ 41.684180] [<ffffffff811ad232>] ? local_pci_probe+0x49/0x92
[ 41.684180] [<ffffffff8105afc5>] ? do_work_for_cpu+0x0/0x1b
[ 41.684180] [<ffffffff8105afc5>] ? do_work_for_cpu+0x0/0x1b
[ 41.684180] [<ffffffff8105afd0>] ? do_work_for_cpu+0xb/0x1b
[ 41.684180] [<ffffffff8105fd3f>] ? kthread+0x7a/0x82
[ 41.684180] [<ffffffff8100a824>] ? kernel_thread_helper+0x4/0x10
[ 41.684180] [<ffffffff8105fcc5>] ? kthread+0x0/0x82
[ 41.684180] [<ffffffff8100a820>] ? kernel_thread_helper+0x0/0x10
[ 41.684180] Code: f4 01 00 00 ef 31 f6 48 89 df e8 29 dd ff ff 85 c0 0f 88 2b 03 00 00 48 89 ef e8 b4 39 c3 e0 8b 7b 40 e8 fc 9d b1 e0 48 8b 43 38 <66> 8b 10 66 89 14 24 8b 43 14 83 e8 03 83 f8 01 77 32 31 d2 be
[ 41.684180] RIP [<ffffffffa0578402>] azx_probe+0x3ad/0x86b [snd_hda_intel]
[ 41.684180] RSP <ffff88013153fe50>
[ 41.684180] CR2: ffffc90011c08000
[ 41.684180] ---[ end trace 8d1f3ebc136437fd ]---
[…]
Trusting the ACPI _CRS information (`pci=use_crs`) fixes this problem.
$ dmesg | grep -i crs # with the quirk
[ 0.153559] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
The match has to be against the DMI board entries though since the vendor entries are not populated.
[ 0.000000] DMI: System manufacturer System Product Name/M2V-MX SE, BIOS 0304 10/30/2007
This quirk should be removed when `pci=use_crs` is enabled for machines
from 2006 or earlier or some other solution is implemented.
Using coreboot [1] with this board the problem does not exist but this
quirk also does not affect it either. To be safe though the check is
tightened to only take effect when the BIOS from American Megatrends is
used.
15:13 < ruik> but coreboot does not need that
15:13 < ruik> because i have there only one root bus
15:13 < ruik> the audio is behind a bridge
$ sudo dmidecode
[…]
BIOS Information
Vendor: American Megatrends Inc.
Version: 0304
Release Date: 10/30/2007
[…]
[1] http://www.coreboot.org/
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=30552
CC: Linus Torvalds <torvalds@linux-foundation.org>
CC: stable@kernel.org (≥ 2.6.34)
CC: Thomas Gleixner <tglx@linutronix.de>
CC: Ingo Molnar <mingo@redhat.com>
CC: H. Peter Anvin <hpa@zytor.com>
CC: x86@kernel.org
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
Bjorn is working on a real fix. But until he has time and this gets in it would be great to get this quirk in right now.
v3:
• add comment about other fix to commit message
• add Sob of Bjorn and Acked-by of Jesse. I hope the order is correct.
v2:
• update commit message
• use Bjorn’s current address
---
arch/x86/pci/acpi.c | 11 +++++++++++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index ae3cb23..ff23d17 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -43,6 +43,17 @@ static const struct dmi_system_id pci_use_crs_table[] __initconst = {
DMI_MATCH(DMI_PRODUCT_NAME, "ALiveSATA2-GLAN"),
},
},
+ /* https://bugzilla.kernel.org/show_bug.cgi?id=30552 */
+ /* 2006 AMD HT/VIA system with two host bridges */
+ {
+ .callback = set_use_crs,
+ .ident = "ASUS M2V-MX SE",
+ .matches = {
+ DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+ DMI_MATCH(DMI_BOARD_NAME, "M2V-MX SE"),
+ DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
+ },
+ },
{}
};
--
1.7.6.3
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 198 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2011-10-06 22:15 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-09-20 10:20 [PATCH v2] x86/PCI: use host bridge _CRS info on ASUS M2V-MX SE Paul Menzel
2011-09-20 16:39 ` Bjorn Helgaas
2011-09-27 9:39 ` Paul Menzel
2011-09-27 14:09 ` Bjorn Helgaas
2011-10-04 14:37 ` Paul Menzel
2011-10-04 15:03 ` Bjorn Helgaas
2011-10-06 15:14 ` Jesse Barnes
2011-10-06 22:14 ` [PATCH v3] " Paul Menzel
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®