Re: [PATCH V2 1/4] perf: Add hardware breakpoint address mask

[Jacob Shin <jacob.shin@amd.com>]

On Thu, Apr 25, 2013 at 05:10:35PM +0200, Oleg Nesterov wrote:
> On 04/25, Frederic Weisbecker wrote:
> >
> > 2013/4/23 Jacob Shin <jacob.shin@amd.com>:
> > > @@ -286,7 +286,10 @@ struct perf_event_attr {
> > >                 __u64           config1; /* extension of config */
> > >         };
> > >         union {
> > > -               __u64           bp_len;
> > > +               struct {
> > > +                       __u32           bp_len;
> > > +                       __u32           bp_addr_mask;
> > > +               };
> >
> > Do we need len and mask to work at the same time? I can't think of a
> > situation when len and mask mix up together in a useful way to define
> > a range.

Okay, we can make it:

union {
      __u64 bp_len;
      __u64 bp_addr_mask;
      __config2;
};

And in x86, bp_len != HW_BREAKPOINT_LEN_1,2,4,8 will be interpreted as
bp_addr_mask.

> 
> And it would be nice (I think) if we could simply turn bp_len into
> bp_mask. It is already the mask actually, bp_addr should be aligned.
> 
> But I do not see how we can do this, so I guess we need another field.
> 
> Well. Another option is to extend bp_len. Fortunately HW_BREAKPOINT_LEN_*
> match the length, so we can simply allow any 2^n length and amd.c can
> translate it into the mask.

Okay, this is nice because we can just ride on top of what already exits,
but ...

> 
> Of course, this doesn't allow to use, say, mask=0xF0. But perhaps this
> is not really useful?

Exactly .. Right I think most of the time we are trying to trap on range
of contiguous addresses, but .. mask of 0xf0 allows us to trap on 16 byte
aligned addresses:

addr of 0x1000 and mask of 0xf0 will count accesses to:

0x1000, 0x1010, 0x1020, .. 0x10e0, 0x10f0

Maybe there is some big blob of data and user wants to see how many times
16 byte aligned addresses get hit. This might be not as common, but it is
plausible no?