From: Andi Kleen <andi@firstfloor.org>
To: mingo@kernel.org
Cc: mingo@elte.hu, linux-kernel@vger.kernel.org,
Peter Zijlstra <a.p.zijlstra@chello.nl>,
Arnaldo Carvalho de Melo <acme@infradead.org>,
Thomas Gleixner <tglx@linutronix.de>,
"H. Peter Anvin" <hpa@zytor.com>,
Andrew Morton <akpm@linux-foundation.org>
Subject: Your action on perf bug report is requested was Re: Basic perf PMU support for Haswell v11
Date: Wed, 1 May 2013 12:10:41 +0200 [thread overview]
Message-ID: <20130501101041.GG17814@two.firstfloor.org> (raw)
In-Reply-To: <20130426225235.GI16732@two.firstfloor.org>
> I found a similar system (not same stepping, but same model) and tested
> perf top works fine here. Also on a couple of other systems.
>
> Since I cannot reproduce I would need your help debugging it.
Ingo, I haven't heard back from you on this.
You reported an unreproducable bug. I gave you several steps to
diagnose the problem, so that we can make progress on this.
You've had several days time now to to this, but I have not
heard from you.
If you don't report back from 5/3/2013 I'll assume it was some
other mistake on your side.
As a reminder:
I assume it worked before my patches. If you don't know
please double check. Also I assume there's no general
problem between the user land perf you used and the kernel.
The only patch I could think of which may affect other systems
is the moving of the APIC ack.
So does it work if you revert
perf, x86: Move NMI clearing to end of PMI handler after ...
If that is it we could white list it for Haswell.
If that's not it I may need a bisect, assuming the problem is stable.
Thanks for your cooperation.
-Andi
next prev parent reply other threads:[~2013-05-01 10:10 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-20 19:06 Andi Kleen
2013-04-20 19:06 ` [PATCH 1/5] perf, x86: Add Haswell PEBS record support v5 Andi Kleen
2013-04-20 19:06 ` [PATCH 2/5] perf, x86: Basic Haswell PMU support v8 Andi Kleen
2013-04-20 19:06 ` [PATCH 3/5] perf, x86: Basic Haswell PEBS support v4 Andi Kleen
2013-04-20 19:06 ` [PATCH 4/5] perf, x86: Move NMI clearing to end of PMI handler after the counter registers are reset Andi Kleen
2013-04-20 19:06 ` [PATCH 5/5] perf, x86: Support Haswell v4 LBR format v2 Andi Kleen
2013-09-03 19:25 ` Vince Weaver
2013-09-03 20:28 ` Andi Kleen
2013-09-03 21:14 ` Vince Weaver
2013-09-03 22:37 ` Andi Kleen
2013-09-04 14:21 ` Vince Weaver
2013-09-04 17:05 ` Andi Kleen
2013-04-26 6:55 ` Basic perf PMU support for Haswell v11 Ingo Molnar
2013-04-26 6:59 ` Ingo Molnar
2013-05-01 10:48 ` Ingo Molnar
2013-04-26 22:52 ` Andi Kleen
2013-05-01 10:10 ` Andi Kleen [this message]
2013-05-01 10:33 ` Your action on perf bug report is requested was " Ingo Molnar
2013-05-02 8:38 ` Ingo Molnar
2013-05-02 8:49 ` Ingo Molnar
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