Re: [PATCH] drm/i915: fix long-standing SNB regression in power consumption after resume

[Daniel Vetter <daniel@ffwll.ch>]

On Sun, Jul 14, 2013 at 08:30:09PM +0400, Konstantin Khlebnikov wrote:
> This patch fixes regression in power consumtion of sandy bridge gpu, which
> exists since v3.6 Sometimes after resuming from s2ram gpu starts thinking that
> it's extremely busy. After that it never reaches rc6 state.
> 
> Bug was introduce by commit b4ae3f22d238617ca11610b29fde16cf8c0bc6e0
> ("drm/i915: load boot context at driver init time"). Without documentation
> it's not clear what is happening here, probably this breaks internal state of
> hardware ring buffers and confuses RPS engine. Fortunately keeping forcewake
> during whole initialization sequence in gen6_init_clock_gating() fixes this bug.
> 
> References: https://bugs.freedesktop.org/show_bug.cgi?id=54089
> Signed-off-by: Konstantin Khlebnikov <khlebnikov@openvz.org>

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=58971
Tested-by: Alexander Kaltsas <alexkaltsas@gmail.com>
Tested-by: rocko <rockorequin@hotmail.com>

> ---
>  drivers/gpu/drm/i915/intel_pm.c |    4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index aa01128..839a43f 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3640,6 +3640,8 @@ static void gen6_init_clock_gating(struct drm_device *dev)
>  	int pipe;
>  	uint32_t dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE;
>  
> +	gen6_gt_force_wake_get(dev_priv);
> +
>  	I915_WRITE(ILK_DSPCLK_GATE_D, dspclk_gate);
>  
>  	I915_WRITE(ILK_DISPLAY_CHICKEN2,
> @@ -3728,6 +3730,8 @@ static void gen6_init_clock_gating(struct drm_device *dev)
>  	cpt_init_clock_gating(dev);
>  
>  	gen6_check_mch_setup(dev);
> +
> +	gen6_gt_force_wake_put(dev_priv);
>  }
>  
>  static void gen7_setup_fixed_func_scheduler(struct drm_i915_private *dev_priv)
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch