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From: Daniel Vetter <daniel@ffwll.ch>
To: Konstantin Khlebnikov <khlebnikov@openvz.org>,
	David Airlie <airlied@linux.ie>,
	intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	dri-devel@lists.freedesktop.org,
	Chris Wilson <chris@chris-wilson.co.uk>
Subject: Re: [PATCH] drm/i915: fix long-standing SNB regression in power consumption after resume
Date: Tue, 16 Jul 2013 14:06:14 +0200	[thread overview]
Message-ID: <20130716120614.GR5784@phenom.ffwll.local> (raw)
In-Reply-To: <20130716063240.GL5784@phenom.ffwll.local>

On Tue, Jul 16, 2013 at 08:32:40AM +0200, Daniel Vetter wrote:
> On Sun, Jul 14, 2013 at 08:30:09PM +0400, Konstantin Khlebnikov wrote:
> > This patch fixes regression in power consumtion of sandy bridge gpu, which
> > exists since v3.6 Sometimes after resuming from s2ram gpu starts thinking that
> > it's extremely busy. After that it never reaches rc6 state.
> > 
> > Bug was introduce by commit b4ae3f22d238617ca11610b29fde16cf8c0bc6e0
> > ("drm/i915: load boot context at driver init time"). Without documentation
> > it's not clear what is happening here, probably this breaks internal state of
> > hardware ring buffers and confuses RPS engine. Fortunately keeping forcewake
> > during whole initialization sequence in gen6_init_clock_gating() fixes this bug.
> > 
> > References: https://bugs.freedesktop.org/show_bug.cgi?id=54089
> > Signed-off-by: Konstantin Khlebnikov <khlebnikov@openvz.org>
> 
> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=58971
> Tested-by: Alexander Kaltsas <alexkaltsas@gmail.com>
> Tested-by: rocko <rockorequin@hotmail.com>
Tested-by: JohnMB <johnmbryant@sky.com>
> 
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c |    4 ++++
> >  1 file changed, 4 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index aa01128..839a43f 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -3640,6 +3640,8 @@ static void gen6_init_clock_gating(struct drm_device *dev)
> >  	int pipe;
> >  	uint32_t dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE;
> >  
> > +	gen6_gt_force_wake_get(dev_priv);
> > +
> >  	I915_WRITE(ILK_DSPCLK_GATE_D, dspclk_gate);
> >  
> >  	I915_WRITE(ILK_DISPLAY_CHICKEN2,
> > @@ -3728,6 +3730,8 @@ static void gen6_init_clock_gating(struct drm_device *dev)
> >  	cpt_init_clock_gating(dev);
> >  
> >  	gen6_check_mch_setup(dev);
> > +
> > +	gen6_gt_force_wake_put(dev_priv);
> >  }
> >  
> >  static void gen7_setup_fixed_func_scheduler(struct drm_i915_private *dev_priv)
> > 
> 
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

  reply	other threads:[~2013-07-16 12:06 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-07-14 16:30 Konstantin Khlebnikov
2013-07-14 16:52 ` Daniel Vetter
2013-07-14 17:56   ` Konstantin Khlebnikov
2013-07-16  6:31     ` Daniel Vetter
     [not found]       ` <CALYGNiOtt7FUCTqcyBELoHYEVw_zqmA=bpmHy_nDkhXCduB9qg@mail.gmail.com>
2013-07-16  7:44         ` Daniel Vetter
2013-07-16  8:31           ` Chris Wilson
2013-07-16 11:13             ` Daniel Vetter
2013-07-16 17:06         ` [Intel-gfx] " Jesse Barnes
2013-07-16 20:19           ` Jesse Barnes
2013-07-16 20:43             ` Daniel Vetter
2013-07-16 20:52               ` Jesse Barnes
2013-07-14 21:48   ` Chris Wilson
2013-07-16  6:32 ` Daniel Vetter
2013-07-16 12:06   ` Daniel Vetter [this message]
2013-07-17  6:22 ` [PATCH v2] " Konstantin Khlebnikov
2013-07-17  6:44   ` Daniel Vetter
2013-07-17 14:47   ` Jesse Barnes

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