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* [PATCH v3] regmap: irq: clear status when disable irq
@ 2013-10-22 10:44 Yi Zhang
  2013-10-23  9:18 ` Mark Brown
  0 siblings, 1 reply; 2+ messages in thread
From: Yi Zhang @ 2013-10-22 10:44 UTC (permalink / raw)
  To: broonie, yizhang.mrvl, yizhang; +Cc: zhouqiao, zhangwm, linux-kernel

clear the status bit if the mask register doesn't prevent
the chip level irq from being asserted

OR in the following sequence, there will be irq storm happens:
1) interrupt is triggered;
2) another thread disables it(the mask bit is set);
3) _Then_ the interrupt thread is not ACKed(the status bit is not cleared),
   and it's ignored;
4) if the irq is still asserted because of the uncleared status bit,
   the irq storm happens;

Signed-off-by: Yi Zhang <yizhang@marvell.com>
---
 drivers/base/regmap/regmap-irq.c |   16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c
index d10456f..763c60d 100644
--- a/drivers/base/regmap/regmap-irq.c
+++ b/drivers/base/regmap/regmap-irq.c
@@ -105,6 +105,22 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
 					"Failed to sync wakes in %x: %d\n",
 					reg, ret);
 		}
+
+		if (!d->chip->init_ack_masked)
+			continue;
+		/*
+		 * Ack all the masked interrupts uncondictionly,
+		 * OR if there is masked interrupt which hasn't been Acked,
+		 * it'll be ignored in irq handler, then may introduce irq storm
+		 */
+		if (d->mask_buf[i] && d->chip->ack_base) {
+			reg = d->chip->ack_base +
+				(i * map->reg_stride * d->irq_reg_stride);
+			ret = regmap_write(map, reg, d->mask_buf[i]);
+			if (ret != 0)
+				dev_err(d->map->dev, "Failed to ack 0x%x: %d\n",
+					reg, ret);
+		}
 	}
 
 	if (d->chip->runtime_pm)
-- 
1.7.9.5


^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH v3] regmap: irq: clear status when disable irq
  2013-10-22 10:44 [PATCH v3] regmap: irq: clear status when disable irq Yi Zhang
@ 2013-10-23  9:18 ` Mark Brown
  0 siblings, 0 replies; 2+ messages in thread
From: Mark Brown @ 2013-10-23  9:18 UTC (permalink / raw)
  To: Yi Zhang; +Cc: yizhang.mrvl, zhouqiao, zhangwm, linux-kernel

[-- Attachment #1: Type: text/plain, Size: 177 bytes --]

On Tue, Oct 22, 2013 at 06:44:32PM +0800, Yi Zhang wrote:
> clear the status bit if the mask register doesn't prevent
> the chip level irq from being asserted

Applied, thanks.

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^ permalink raw reply	[flat|nested] 2+ messages in thread

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