From: Bjorn Helgaas <bhelgaas@google.com>
To: linux-pci@vger.kernel.org, Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: David Airlie <airlied@linux.ie>, Yinghai Lu <yinghai@kernel.org>,
Guo Chao <yan@linux.vnet.ibm.com>,
linux-kernel@vger.kernel.org
Subject: [PATCH v7 07/15] agp/intel: Rename gtt_bus_addr to gtt_phys_addr
Date: Mon, 06 Jan 2014 17:56:02 -0700 [thread overview]
Message-ID: <20140107005602.10786.2964.stgit@bhelgaas-glaptop.roam.corp.google.com> (raw)
In-Reply-To: <20140107005003.10786.85164.stgit@bhelgaas-glaptop.roam.corp.google.com>
The only use of gtt_bus_addr is as an argument to ioremap(), so it is a CPU
physical address, not a bus address. Rename it to gtt_phys_addr to reflect
this.
No functional change.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/char/agp/intel-gtt.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index b8e2014cb9cb..54202ffcf467 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -64,7 +64,7 @@ static struct _intel_private {
struct pci_dev *pcidev; /* device one */
struct pci_dev *bridge_dev;
u8 __iomem *registers;
- phys_addr_t gtt_bus_addr;
+ phys_addr_t gtt_phys_addr;
u32 PGETBL_save;
u32 __iomem *gtt; /* I915G */
bool clear_fake_agp; /* on first access via agp, fill with scratch */
@@ -191,7 +191,7 @@ static int i810_setup(void)
writel(virt_to_phys(gtt_table) | I810_PGETBL_ENABLED,
intel_private.registers+I810_PGETBL_CTL);
- intel_private.gtt_bus_addr = reg_addr + I810_PTE_BASE;
+ intel_private.gtt_phys_addr = reg_addr + I810_PTE_BASE;
if ((readl(intel_private.registers+I810_DRAM_CTL)
& I810_DRAM_ROW_0) == I810_DRAM_ROW_0_SDRAM) {
@@ -636,10 +636,10 @@ static int intel_gtt_init(void)
intel_private.gtt = NULL;
if (intel_gtt_can_wc())
- intel_private.gtt = ioremap_wc(intel_private.gtt_bus_addr,
+ intel_private.gtt = ioremap_wc(intel_private.gtt_phys_addr,
gtt_map_size);
if (intel_private.gtt == NULL)
- intel_private.gtt = ioremap(intel_private.gtt_bus_addr,
+ intel_private.gtt = ioremap(intel_private.gtt_phys_addr,
gtt_map_size);
if (intel_private.gtt == NULL) {
intel_private.driver->cleanup();
@@ -796,7 +796,7 @@ static int i830_setup(void)
if (!intel_private.registers)
return -ENOMEM;
- intel_private.gtt_bus_addr = reg_addr + I810_PTE_BASE;
+ intel_private.gtt_phys_addr = reg_addr + I810_PTE_BASE;
return 0;
}
@@ -1123,13 +1123,13 @@ static int i9xx_setup(void)
case 3:
pci_read_config_dword(intel_private.pcidev,
I915_PTEADDR, >t_addr);
- intel_private.gtt_bus_addr = gtt_addr;
+ intel_private.gtt_phys_addr = gtt_addr;
break;
case 5:
- intel_private.gtt_bus_addr = reg_addr + MB(2);
+ intel_private.gtt_phys_addr = reg_addr + MB(2);
break;
default:
- intel_private.gtt_bus_addr = reg_addr + KB(512);
+ intel_private.gtt_phys_addr = reg_addr + KB(512);
break;
}
next prev parent reply other threads:[~2014-01-07 0:56 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-07 0:55 [PATCH v7 00/15] PCI: Allocate 64-bit BARs above 4G when possible Bjorn Helgaas
2014-01-07 0:55 ` [PATCH v7 01/15] PCI: Change pci_bus_region addresses to dma_addr_t Bjorn Helgaas
2014-01-07 0:55 ` [PATCH v7 02/15] PCI: Convert pcibios_resource_to_bus() to take a pci_bus, not a pci_dev Bjorn Helgaas
2014-01-07 0:55 ` [PATCH v7 03/15] PCI: Add pci_bus_address() to get bus address of a BAR Bjorn Helgaas
2014-01-07 0:55 ` [PATCH v7 04/15] agp: Support 64-bit APBASE Bjorn Helgaas
2014-01-07 0:55 ` [PATCH v7 05/15] agp: Use pci_resource_start() to get CPU physical address for BAR Bjorn Helgaas
2014-01-07 0:55 ` [PATCH v7 06/15] drm/i915: Rename gtt_bus_addr to gtt_phys_addr Bjorn Helgaas
2014-01-07 0:56 ` Bjorn Helgaas [this message]
2014-01-07 0:56 ` [PATCH v7 08/15] agp/intel: Support 64-bit GMADR Bjorn Helgaas
2014-01-07 0:56 ` [PATCH v7 09/15] agp/intel: Use pci_bus_address() to get MMADR bus address Bjorn Helgaas
2014-01-07 0:56 ` [PATCH v7 10/15] agp/intel: Use pci_bus_address() to get GTTADR " Bjorn Helgaas
2014-01-07 0:56 ` [PATCH v7 11/15] agp/intel: Use CPU physical address, not bus address, for ioremap() Bjorn Helgaas
2014-01-07 0:56 ` [PATCH v7 12/15] agp/ati: Use PCI_COMMAND instead of hard-coded 4 Bjorn Helgaas
2014-01-07 0:56 ` [PATCH v7 13/15] PCI: Split out bridge window override of minimum allocation address Bjorn Helgaas
2014-01-07 0:56 ` [PATCH v7 14/15] PCI: Enforce bus address limits in resource allocation Bjorn Helgaas
2014-01-07 0:56 ` [PATCH v7 15/15] PCI: Allocate 64-bit BARs above 4G when possible Bjorn Helgaas
2014-01-07 10:46 ` [PATCH v7 00/15] " Daniel Vetter
2014-01-07 18:46 ` Bjorn Helgaas
2014-01-10 21:34 ` Bjorn Helgaas
2014-01-15 5:14 ` Dave Airlie
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