From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>,
Alexandre Courbot <gnurou@gmail.com>,
"Zhu, Lejun" <lejun.zhu@linux.intel.com>,
Mathias Nyman <mathias.nyman@linux.intel.com>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
jacob.jun.pan@linux.intel.com, bin.yang@intel.com
Subject: Re: [PATCH v4] gpio: Add support for Intel SoC PMIC (Crystal Cove)
Date: Thu, 29 May 2014 18:00:58 +0300 [thread overview]
Message-ID: <20140529150058.GB6263@lahna.fi.intel.com> (raw)
In-Reply-To: <CACRpkdbe1=Yt3UDm9f4ZmZ+K2ZB9nVL+RNr7eU_TbnK-CmNY+A@mail.gmail.com>
On Thu, May 29, 2014 at 03:37:37PM +0200, Linus Walleij wrote:
> My idea is that you should call gpiochip_add() *first* and then
> add the IRQs to the chip. In succession.
>
> Rationale: with dynamic GPIO numbers, gpio_to_irq()
> cannot reasonably be working before the gpiochip is added,
> so it should be added first, then the irqchip. Since irq_to_gpio()
> is *NOT* to be used (rather obliterated), this is the sequence
> we mandate.
Thanks for the explanation. Makes sense.
I was wrong again, oh well it happens ;-)
next prev parent reply other threads:[~2014-05-29 15:01 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-23 2:00 Zhu, Lejun
2014-05-27 5:38 ` Alexandre Courbot
2014-05-27 6:15 ` Alexandre Courbot
2014-05-27 6:22 ` Zhu, Lejun
2014-05-27 9:24 ` Grygorii Strashko
2014-05-27 8:46 ` Mika Westerberg
2014-05-27 12:04 ` Grygorii Strashko
2014-05-27 15:14 ` Mika Westerberg
2014-05-29 13:37 ` Linus Walleij
2014-05-29 15:00 ` Mika Westerberg [this message]
2014-05-29 16:03 ` Grygorii Strashko
2014-05-29 15:22 ` Linus Walleij
2014-05-30 8:25 ` Mika Westerberg
2014-06-03 8:10 ` Linus Walleij
2014-06-03 10:57 ` Mika Westerberg
2014-05-30 2:12 ` Zhu, Lejun
2014-06-03 8:08 ` Linus Walleij
2014-05-27 8:56 ` Zhu, Lejun
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