From: Mukesh Rathor <mukesh.rathor@oracle.com>
To: David Vrabel <david.vrabel@citrix.com>
Cc: <boris.ostrovsky@oracle.com>, <xen-devel@lists.xenproject.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [V0 PATCH 0/2] AMD PVH domU support
Date: Fri, 22 Aug 2014 12:15:20 -0700 [thread overview]
Message-ID: <20140822121520.66d3c072@mantra.us.oracle.com> (raw)
In-Reply-To: <53F74BC9.6060207@citrix.com>
On Fri, 22 Aug 2014 14:55:21 +0100
David Vrabel <david.vrabel@citrix.com> wrote:
> On 22/08/14 14:52, David Vrabel wrote:
> > On 21/08/14 03:16, Mukesh Rathor wrote:
> >> Hi,
> >>
> >> Here's first stab at AMD PVH domU support. Pretty much the only
> >> thing needed is EFER bits set. Please review.
> >
> > I'm not going to accept this until there is some ABI documentation
> > stating explicitly what state non-boot CPUs will be in.
>
> Also the boot CPU.
>
> David
Sure, but looks like Roger already beat me to it...
>From Roger's "very initial PVH design document" :
And finally on `EFER` the following features are enabled:
* LME (bit 8): Long mode enable.
* LMA (bit 10): Long mode active.
LMK if anything additional needs to be done.
Mukesh
next prev parent reply other threads:[~2014-08-22 19:15 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-21 2:16 Mukesh Rathor
2014-08-21 2:16 ` [V0 PATCH 1/2] AMD-PVH: set EFER.NX and EFER.SCE for the boot vcpu Mukesh Rathor
2014-08-22 1:39 ` [Xen-devel] " Konrad Rzeszutek Wilk
2014-08-22 2:46 ` Mukesh Rathor
2014-08-22 3:32 ` Konrad Rzeszutek Wilk
2014-08-22 4:41 ` Borislav Petkov
2014-08-22 19:09 ` Mukesh Rathor
2014-08-22 23:29 ` Mukesh Rathor
2014-08-21 2:16 ` [V0 PATCH 2/2] AMD-PVH: set EFER.NX and EFER.SCE for secondary vcpus Mukesh Rathor
2014-08-22 13:52 ` [V0 PATCH 0/2] AMD PVH domU support David Vrabel
2014-08-22 13:55 ` David Vrabel
2014-08-22 19:15 ` Mukesh Rathor [this message]
2014-08-22 22:20 ` Mukesh Rathor
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