From: Andi Kleen <ak@linux.intel.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: mingo@kernel.org, tglx@linutronix.de, eranian@google.com,
dzickus@redhat.com, andi@firstfloor.org, jmario@redhat.com,
acme@kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/3] perf,x86: Add HSW offcore NUMA events
Date: Tue, 28 Oct 2014 06:10:55 -0700 [thread overview]
Message-ID: <20141028131055.GI3274@tassilo.jf.intel.com> (raw)
In-Reply-To: <20141028123352.632326435@infradead.org>
On Tue, Oct 28, 2014 at 01:30:46PM +0100, Peter Zijlstra wrote:
> Based on the actual HSW offcore bits, we can construct the full NODE
> event set in a similar manner to the other uarchs (NHM/SNB).
The better way is to use
MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM
MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_DRAM
directly. These support PEBS too and have various other advantages.
-Andi
prev parent reply other threads:[~2014-10-28 13:11 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-28 12:30 [PATCH 0/3] Cleanup of the HSW offcore bits Peter Zijlstra
2014-10-28 12:30 ` [PATCH 1/3] perf,x86: De-obfuscate " Peter Zijlstra
2014-10-28 13:04 ` Andi Kleen
2014-10-28 12:30 ` [PATCH 2/3] perf,x86: Sanitize HSW offcore events Peter Zijlstra
2014-10-28 12:30 ` [PATCH 3/3] perf,x86: Add HSW offcore NUMA events Peter Zijlstra
2014-10-28 13:10 ` Andi Kleen [this message]
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