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From: Marc Zyngier <marc.zyngier@arm.com>
To: Robert Richter <rric@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Tirumalesh Chalamarla <tchalamarla@cavium.com>,
	Radha Mohan Chintakuntla <rchintakuntla@cavium.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	Robert Richter <rrichter@cavium.com>
Subject: Re: [PATCH 1/4] arm64: gicv3: its: Encode domain number in PCI stream id
Date: Wed, 20 May 2015 13:11:38 +0100	[thread overview]
Message-ID: <20150520131138.2c94a32a@why.wild-wind.fr.eu.org> (raw)
In-Reply-To: <1430686172-18222-2-git-send-email-rric@kernel.org>

On Sun, 3 May 2015 21:49:29 +0100
Robert Richter <rric@kernel.org> wrote:

> From: Tirumalesh Chalamarla <tchalamarla@cavium.com>
> 
> PCI stream ids need to consider pci bridge number to be unique on the
> system. Using only bus and devfn can't do the trick in systems that
> have multiple pci bridges.
> 
> Signed-off-by: Tirumalesh Chalamarla <tchalamarla@cavium.com>
> Signed-off-by: Robert Richter <rrichter@cavium.com>
> ---
>  drivers/irqchip/irq-gic-v3-its.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> index 9687f8afebff..e30b4de04c6c 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -1186,7 +1186,7 @@ static int its_get_pci_alias(struct pci_dev *pdev, u16 alias, void *data)
>  {
>  	struct its_pci_alias *dev_alias = data;
>  
> -	dev_alias->dev_id = alias;
> +	dev_alias->dev_id = (pci_domain_nr(pdev->bus) << 16) | alias;
>  	if (pdev != dev_alias->pdev)
>  		dev_alias->count += its_pci_msi_vec_count(dev_alias->pdev);
>  

This feels very scary. We're now assuming that the domain number will
always be presented to the doorbell. What guarantee do we have that
this is always the case, irrespective of the platform?

Also, domains have no PCI reality, they are a Linux thing. And they can
be "randomly" assigned, unless you force the domain in DT with a
linux,pci-domain property. This looks even more wrong, specially
considering ACPI.

It really feels like we need a way to describe how the BDF numbering is
augmented. We also need to guarantee that we get the actual bridge
number, as opposed to the domain number.

Thoughts?

	M.
-- 
Without deviation from the norm, progress is not possible.

  reply	other threads:[~2015-05-20 12:10 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-03 20:49 [PATCH 0/4] arm64: gicv3: its: Fixes and updates for ThunderX Robert Richter
2015-05-03 20:49 ` [PATCH 1/4] arm64: gicv3: its: Encode domain number in PCI stream id Robert Richter
2015-05-20 12:11   ` Marc Zyngier [this message]
2015-05-20 12:48     ` Robert Richter
2015-05-22  8:26       ` Marc Zyngier
2015-05-22 22:57         ` Chalamarla, Tirumalesh
2015-05-25 10:38           ` Marc Zyngier
2015-05-03 20:49 ` [PATCH 2/4] arm64: gicv3: its: Add range check for number of allocated pages Robert Richter
2015-05-20 12:14   ` Marc Zyngier
2015-05-03 20:49 ` [PATCH 3/4] arm64: gicv3: its: Read typer register outside the loop Robert Richter
2015-05-20 12:15   ` Marc Zyngier
2015-05-03 20:49 ` [PATCH 4/4] arm64: gicv3: its: Increase FORCE_MAX_ZONEORDER for Cavium ThunderX Robert Richter
2015-05-05 10:53   ` Will Deacon
2015-05-11  9:14     ` Robert Richter
2015-05-12 12:30       ` Will Deacon
2015-05-12 16:20         ` Robert Richter
2015-05-12 17:24           ` Will Deacon
2015-05-12 17:46             ` Robert Richter
2015-05-20 12:22             ` Marc Zyngier
2015-05-20 12:31               ` Robert Richter
2015-05-20 16:48                 ` Catalin Marinas
2015-05-21  8:35                   ` Marc Zyngier
2015-05-21 12:13                     ` Robert Richter
2015-05-21 12:34                       ` Marc Zyngier

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