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From: Marc Zyngier <marc.zyngier@arm.com>
To: Robert Richter <rric@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Tirumalesh Chalamarla <tchalamarla@cavium.com>,
	Radha Mohan Chintakuntla <rchintakuntla@cavium.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	Robert Richter <rrichter@cavium.com>
Subject: Re: [PATCH 3/4] arm64: gicv3: its: Read typer register outside the loop
Date: Wed, 20 May 2015 13:15:24 +0100	[thread overview]
Message-ID: <20150520131524.09d325fe@why.wild-wind.fr.eu.org> (raw)
In-Reply-To: <1430686172-18222-4-git-send-email-rric@kernel.org>

On Sun, 3 May 2015 21:49:31 +0100
Robert Richter <rric@kernel.org> wrote:

> From: Robert Richter <rrichter@cavium.com>
> 
> No need to read the typer register in the loop. Values do not change.
> 
> Signed-off-by: Robert Richter <rrichter@cavium.com>

Fair enough.

Acked-by: Marc Zyngier <marc.zyngier@arm.com>

	M.

> ---
>  drivers/irqchip/irq-gic-v3-its.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> index a2619a1d5bb3..916c4724c771 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -803,6 +803,8 @@ static int its_alloc_tables(struct its_node *its)
>  	int psz = SZ_64K;
>  	u64 shr = GITS_BASER_InnerShareable;
>  	u64 cache = GITS_BASER_WaWb;
> +	u64 typer = readq_relaxed(its->base + GITS_TYPER);
> +	u32 ids = GITS_TYPER_DEVBITS(typer);
>  
>  	for (i = 0; i < GITS_BASER_NR_REGS; i++) {
>  		u64 val = readq_relaxed(its->base + GITS_BASER + i * 8);
> @@ -826,9 +828,6 @@ static int its_alloc_tables(struct its_node *its)
>  		 * For other tables, only allocate a single page.
>  		 */
>  		if (type == GITS_BASER_TYPE_DEVICE) {
> -			u64 typer = readq_relaxed(its->base + GITS_TYPER);
> -			u32 ids = GITS_TYPER_DEVBITS(typer);
> -
>  			order = get_order((1UL << ids) * entry_size);
>  			if (order >= MAX_ORDER) {
>  				order = MAX_ORDER - 1;



-- 
Without deviation from the norm, progress is not possible.

  reply	other threads:[~2015-05-20 12:13 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-03 20:49 [PATCH 0/4] arm64: gicv3: its: Fixes and updates for ThunderX Robert Richter
2015-05-03 20:49 ` [PATCH 1/4] arm64: gicv3: its: Encode domain number in PCI stream id Robert Richter
2015-05-20 12:11   ` Marc Zyngier
2015-05-20 12:48     ` Robert Richter
2015-05-22  8:26       ` Marc Zyngier
2015-05-22 22:57         ` Chalamarla, Tirumalesh
2015-05-25 10:38           ` Marc Zyngier
2015-05-03 20:49 ` [PATCH 2/4] arm64: gicv3: its: Add range check for number of allocated pages Robert Richter
2015-05-20 12:14   ` Marc Zyngier
2015-05-03 20:49 ` [PATCH 3/4] arm64: gicv3: its: Read typer register outside the loop Robert Richter
2015-05-20 12:15   ` Marc Zyngier [this message]
2015-05-03 20:49 ` [PATCH 4/4] arm64: gicv3: its: Increase FORCE_MAX_ZONEORDER for Cavium ThunderX Robert Richter
2015-05-05 10:53   ` Will Deacon
2015-05-11  9:14     ` Robert Richter
2015-05-12 12:30       ` Will Deacon
2015-05-12 16:20         ` Robert Richter
2015-05-12 17:24           ` Will Deacon
2015-05-12 17:46             ` Robert Richter
2015-05-20 12:22             ` Marc Zyngier
2015-05-20 12:31               ` Robert Richter
2015-05-20 16:48                 ` Catalin Marinas
2015-05-21  8:35                   ` Marc Zyngier
2015-05-21 12:13                     ` Robert Richter
2015-05-21 12:34                       ` Marc Zyngier

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