From: Peter Zijlstra <peterz@infradead.org>
To: Harish Chegondi <harish.chegondi@intel.com>
Cc: linux-kernel@vger.kernel.org, mingo@redhat.com,
Harish Chegondi <harish.chegondi@gmail.com>,
Andi Kleen <andi.kleen@intel.com>,
Kan Liang <kan.liang@intel.com>,
Lukasz Anaczkowski <lukasz.anaczkowski@intel.com>
Subject: Re: [PATCH 2/2] perf/x86/intel/uncore: Add Knights Landing uncore PMU support
Date: Tue, 8 Dec 2015 10:07:22 +0100 [thread overview]
Message-ID: <20151208090722.GH6356@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <8ac513981264c3eb10343a3f523f19cc5a2d12fe.1449470704.git.harish.chegondi@intel.com>
On Mon, Dec 07, 2015 at 02:32:32PM -0800, Harish Chegondi wrote:
> @@ -981,6 +990,8 @@ static int __init uncore_pci_init(void)
> break;
> case 61: /* Broadwell */
> ret = bdw_uncore_pci_init();
> + case 87: /* Knights Landing */
> + ret = knl_uncore_pci_init();
> break;
> default:
> return 0;
> @@ -1289,6 +1300,8 @@ static int __init uncore_cpu_init(void)
> break;
> case 86: /* BDX-DE */
> bdx_uncore_cpu_init();
> + case 87: /* Knights Landing */
> + knl_uncore_cpu_init();
> break;
> default:
Surely you need some extra break statements in there?
next prev parent reply other threads:[~2015-12-08 9:08 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-07 22:32 [PATCH 1/2] perf/x86/intel/uncore: Remove hard coding of PMON box control MSR offset Harish Chegondi
2015-12-07 22:32 ` [PATCH 2/2] perf/x86/intel/uncore: Add Knights Landing uncore PMU support Harish Chegondi
2015-12-08 9:07 ` Peter Zijlstra [this message]
2015-12-09 21:03 ` Harish Chegondi
2015-12-09 23:37 ` Peter Zijlstra
2015-12-09 23:43 ` Harish Chegondi
2016-01-06 18:54 ` [tip:perf/core] " tip-bot for Harish Chegondi
2016-01-06 18:53 ` [tip:perf/core] perf/x86/intel/uncore: Remove hard coding of PMON box control MSR offset tip-bot for Harish Chegondi
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