From: Peter Zijlstra <peterz@infradead.org>
To: Harish Chegondi <harish.chegondi@intel.com>
Cc: linux-kernel@vger.kernel.org, mingo@redhat.com,
Harish Chegondi <harish.chegondi@gmail.com>,
Andi Kleen <andi.kleen@intel.com>,
Kan Liang <kan.liang@intel.com>,
Lukasz Anaczkowski <lukasz.anaczkowski@intel.com>
Subject: Re: [PATCH 2/2] perf/x86/intel/uncore: Add Knights Landing uncore PMU support
Date: Thu, 10 Dec 2015 00:37:53 +0100 [thread overview]
Message-ID: <20151209233753.GT6356@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <5668972F.5030805@intel.com>
On Wed, Dec 09, 2015 at 01:03:43PM -0800, Harish Chegondi wrote:
>
>
> On 12/08/2015 01:07 AM, Peter Zijlstra wrote:
> > On Mon, Dec 07, 2015 at 02:32:32PM -0800, Harish Chegondi wrote:
> >> @@ -981,6 +990,8 @@ static int __init uncore_pci_init(void)
> >> break;
> >> case 61: /* Broadwell */
> >> ret = bdw_uncore_pci_init();
> >> + case 87: /* Knights Landing */
> >> + ret = knl_uncore_pci_init();
> >> break;
> >> default:
> >> return 0;
> >> @@ -1289,6 +1300,8 @@ static int __init uncore_cpu_init(void)
> >> break;
> >> case 86: /* BDX-DE */
> >> bdx_uncore_cpu_init();
> >> + case 87: /* Knights Landing */
> >> + knl_uncore_cpu_init();
> >> break;
> >> default:
> > Surely you need some extra break statements in there?
> > .
> >
> Yes, I missed the break statements. I will add the breaks in the next version of the patch.
Fixed it already. No need to resend.
next prev parent reply other threads:[~2015-12-09 23:37 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-07 22:32 [PATCH 1/2] perf/x86/intel/uncore: Remove hard coding of PMON box control MSR offset Harish Chegondi
2015-12-07 22:32 ` [PATCH 2/2] perf/x86/intel/uncore: Add Knights Landing uncore PMU support Harish Chegondi
2015-12-08 9:07 ` Peter Zijlstra
2015-12-09 21:03 ` Harish Chegondi
2015-12-09 23:37 ` Peter Zijlstra [this message]
2015-12-09 23:43 ` Harish Chegondi
2016-01-06 18:54 ` [tip:perf/core] " tip-bot for Harish Chegondi
2016-01-06 18:53 ` [tip:perf/core] perf/x86/intel/uncore: Remove hard coding of PMON box control MSR offset tip-bot for Harish Chegondi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20151209233753.GT6356@twins.programming.kicks-ass.net \
--to=peterz@infradead.org \
--cc=andi.kleen@intel.com \
--cc=harish.chegondi@gmail.com \
--cc=harish.chegondi@intel.com \
--cc=kan.liang@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=lukasz.anaczkowski@intel.com \
--cc=mingo@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
Powered by JetHome