From: Brian Norris <computersforpeace@gmail.com>
To: Jiancheng Xue <xuejiancheng@huawei.com>
Cc: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
dwmw2@infradead.org, zajec5@gmail.com,
boris.brezillon@free-electrons.com, jteki@openedev.com,
ezequiel@vanguardiasur.com.ar, juhosg@openwrt.org,
shijie.huang@intel.com, mika.westerberg@linux.intel.com,
furquan@google.com, han.xu@freescale.com,
fabio.estevam@freescale.com, manabian@gmail.com,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-mtd@lists.infradead.org, yanhaifeng@hisilicon.com,
yanghongwei@hisilicon.com, suwenping@hisilicon.com,
raojun@hisilicon.com, ml.yang@hisilicon.com,
gaofei@hisilicon.com, zhangzhenxing@hisilicon.com,
xuejiancheng@hisilicon.com, Binquan Peng <pengbinquan@huawei.com>
Subject: Re: [RESEND PATCH v7] mtd: spi-nor: add hisilicon spi-nor flash controller driver
Date: Wed, 9 Mar 2016 10:50:24 -0800 [thread overview]
Message-ID: <20160309185024.GN55664@google.com> (raw)
In-Reply-To: <56DE9A79.30704@huawei.com>
On Tue, Mar 08, 2016 at 05:25:13PM +0800, Jiancheng Xue wrote:
> On 2016/3/8 6:52, Brian Norris wrote:
> [...]
> >> +static void hisi_spi_nor_dma_transfer(struct spi_nor *nor, u32 start_off,
> >> + u32 dma_buf, u32 len, u8 op_type)
> >
> > Does this controller support 64-bit addresses? What if you see LPAE, or
> > an ARM64 CPU? It'd be nice if you don't truncate potentially 64-bit
> > dma_buf down to u32.
> >
> > Brian
> >
> No, this controller just supports 32-bit addresses. So I think I have to truncate 64-bit dma_buf. :(
Then you should handle this proactively. Either some kind of WARN_ON and
error condition, or I think dma_set_mask_and_coherent(dev,
DMA_BIT_MASK(32)) should be able to ensure you get addresses in the
appropriate range?
Brian
prev parent reply other threads:[~2016-03-09 18:50 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-26 8:11 Jiancheng Xue
2016-03-05 0:35 ` Ezequiel Garcia
2016-03-07 22:52 ` Brian Norris
2016-03-08 9:25 ` Jiancheng Xue
2016-03-08 9:46 ` Boris Brezillon
2016-03-09 3:35 ` Jiancheng Xue
2016-03-09 18:50 ` Brian Norris [this message]
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