From: Mike Travis <travis@sgi.com>
To: Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
Thomas Gleixner <tglx@linutronix.de>,
Andrew Morton <akpm@linux-foundation.org>,
Len Brown <len.brown@intel.com>,
Dimitri Sivanich <sivanich@sgi.com>
Cc: Russ Anderson <rja@sgi.com>, John Estabrook <estabrook@sgi.com>,
Andrew Banman <abanman@sgi.com>, Nathan Zimmer <nzimmer@sgi.com>,
x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH 20/21] X86_64, UV: Remove Obsolete GRU MMR address translation
Date: Thu, 28 Apr 2016 18:10:51 -0500 [thread overview]
Message-ID: <20160428231035.205202427@asylum.americas.sgi.com> (raw)
In-Reply-To: <20160428231031.265120287@asylum.americas.sgi.com>
[-- Attachment #1: uv4_remove_global_gru_mmr_addr --]
[-- Type: text/plain, Size: 3391 bytes --]
From: Dimitri Sivanich <sivanich@sgi.com>
Use no-op messages in place of cross-partition interrupts when nacking a
put message in the GRU. This allows us to remove MMR's as a destination
from the GRU driver.
Signed-off-by: Dimitri Sivanich <sivanich@sgi.com>
Signed-off-by: Mike Travis <travis@sgi.com>
Tested-by: John Estabrook <estabrook@sgi.com>
Tested-by: Gary Kroening <gfk@sgi.com>
Tested-by: Nathan Zimmer <nzimmer@sgi.com>
---
arch/x86/include/asm/uv/uv_hub.h | 10 ---------
drivers/misc/sgi-gru/grukservices.c | 38 ++++++++++++++++++++----------------
2 files changed, 22 insertions(+), 26 deletions(-)
--- linux.orig/arch/x86/include/asm/uv/uv_hub.h
+++ linux/arch/x86/include/asm/uv/uv_hub.h
@@ -640,16 +640,6 @@ static inline unsigned long uv_read_glob
return readq(uv_global_mmr64_address(pnode, offset));
}
-/*
- * Global MMR space addresses when referenced by the GRU. (GRU does
- * NOT use socket addressing).
- */
-static inline unsigned long uv_global_gru_mmr_address(int pnode, unsigned long offset)
-{
- return UV_GLOBAL_GRU_MMR_BASE | offset |
- ((unsigned long)pnode << uv_hub_info->m_val);
-}
-
static inline void uv_write_global_mmr8(int pnode, unsigned long offset, unsigned char val)
{
writeb(val, uv_global_mmr64_address(pnode, offset));
--- linux.orig/drivers/misc/sgi-gru/grukservices.c
+++ linux/drivers/misc/sgi-gru/grukservices.c
@@ -718,8 +718,8 @@ cberr:
static int send_message_put_nacked(void *cb, struct gru_message_queue_desc *mqd,
void *mesg, int lines)
{
- unsigned long m, *val = mesg, gpa, save;
- int ret;
+ unsigned long m;
+ int ret, loops = 200; /* experimentally determined */
m = mqd->mq_gpa + (gru_get_amo_value_head(cb) << 6);
if (lines == 2) {
@@ -735,22 +735,28 @@ static int send_message_put_nacked(void
return MQE_OK;
/*
- * Send a cross-partition interrupt to the SSI that contains the target
- * message queue. Normally, the interrupt is automatically delivered by
- * hardware but some error conditions require explicit delivery.
- * Use the GRU to deliver the interrupt. Otherwise partition failures
+ * Send a noop message in order to deliver a cross-partition interrupt
+ * to the SSI that contains the target message queue. Normally, the
+ * interrupt is automatically delivered by hardware following mesq
+ * operations, but some error conditions require explicit delivery.
+ * The noop message will trigger delivery. Otherwise partition failures
* could cause unrecovered errors.
*/
- gpa = uv_global_gru_mmr_address(mqd->interrupt_pnode, UVH_IPI_INT);
- save = *val;
- *val = uv_hub_ipi_value(mqd->interrupt_apicid, mqd->interrupt_vector,
- dest_Fixed);
- gru_vstore_phys(cb, gpa, gru_get_tri(mesg), IAA_REGISTER, IMA);
- ret = gru_wait(cb);
- *val = save;
- if (ret != CBS_IDLE)
- return MQE_UNEXPECTED_CB_ERR;
- return MQE_OK;
+ do {
+ ret = send_noop_message(cb, mqd, mesg);
+ } while ((ret == MQIE_AGAIN || ret == MQE_CONGESTION) && (loops-- > 0));
+
+ if (ret == MQIE_AGAIN || ret == MQE_CONGESTION) {
+ /*
+ * Don't indicate to the app to resend the message, as it's
+ * already been successfully sent. We simply send an OK
+ * (rather than fail the send with MQE_UNEXPECTED_CB_ERR),
+ * assuming that the other side is receiving enough
+ * interrupts to get this message processed anyway.
+ */
+ ret = MQE_OK;
+ }
+ return ret;
}
/*
--
next prev parent reply other threads:[~2016-04-28 23:11 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-28 23:10 [PATCH 00/21] X86_64, UV: Update kernel for SGI UV4 support Mike Travis
2016-04-28 23:10 ` [PATCH 01/21] X86_64, UV: Add Initial UV4 definitions Mike Travis
2016-04-28 23:10 ` [PATCH 02/21] X86_64, UV: Add UV Architecture Defines Mike Travis
2016-04-28 23:10 ` [PATCH 03/21] X86_64, UV: Add UV4 Specific Defines Mike Travis
2016-04-28 23:10 ` [PATCH 04/21] X86_64, UV: Add UV MMR Illegal Access Function Mike Travis
2016-04-28 23:10 ` [PATCH 05/21] X86_64, UV: Prep for UV4 MMR updates Mike Travis
2016-04-28 23:10 ` [PATCH 06/21] X86_64, UV: Add UV4 Specific MMR definitions Mike Travis
2016-04-28 23:10 ` [PATCH 07/21] X86_64, UV: Enable/Disable UV1 only workaround code Mike Travis
2016-04-29 7:40 ` Ingo Molnar
2016-04-28 23:10 ` [PATCH 08/21] X86_64, UV: Clean up redunduncies after merge of UV4 MMR definitions Mike Travis
2016-04-28 23:10 ` [PATCH 09/21] X86_64, UV: Update MMIOH setup function to work for both UV3 and UV4 Mike Travis
2016-04-28 23:10 ` [PATCH 10/21] X86_64, UV: Create per cpu info structs to replace per hub info structs Mike Travis
2016-04-28 23:10 ` [PATCH 11/21] X86_64, UV: Move scir info to the per cpu info struct Mike Travis
2016-04-28 23:10 ` [PATCH 12/21] X86_64, UV: Move blade local processor ID " Mike Travis
2016-04-28 23:10 ` [PATCH 13/21] X86_64, UV: Allocate common per node hub info structs on local node Mike Travis
2016-04-28 23:10 ` [PATCH 14/21] X86_64, UV: Fold blade info into per node hub info structs Mike Travis
2016-04-28 23:10 ` [PATCH 15/21] X86_64, UV: Add UV4 addressing discovery function Mike Travis
2016-04-28 23:10 ` [PATCH 16/21] X86_64, UV: Add obtaining GAM Range Table from UV BIOS Mike Travis
2016-04-28 23:10 ` [PATCH 17/21] X86_64, UV: Support UV4 socket address changes Mike Travis
2016-04-28 23:10 ` [PATCH 18/21] X86_64, UV: Build GAM reference tables Mike Travis
2016-04-28 23:10 ` [PATCH 19/21] X86_64, UV: Update physical address conversions for UV4 Mike Travis
2016-04-28 23:10 ` Mike Travis [this message]
2016-04-28 23:10 ` [PATCH 21/21] X86_64, UV: Fix incorrect nodes and pnodes for cpuless and memoryless nodes Mike Travis
-- strict thread matches above, loose matches on Subject: below --
2016-04-29 21:54 [PATCH 00/21] X86_64, UV: Update kernel for SGI UV4 support Mike Travis
2016-04-29 21:54 ` [PATCH 20/21] X86_64, UV: Remove Obsolete GRU MMR address translation Mike Travis
2016-04-28 0:54 [PATCH 00/21] X86_64, UV: Update kernel for SGI UV4 support Mike Travis
2016-04-28 0:55 ` [PATCH 20/21] X86_64, UV: Remove Obsolete GRU MMR address translation Mike Travis
2016-04-28 8:49 ` Ingo Molnar
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