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From: Eduardo Habkost <ehabkost@redhat.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Haozhong Zhang <haozhong.zhang@intel.com>,
	kvm@vger.kernel.org, rkrcmar@redhat.com,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, "H . Peter Anvin" <hpa@zytor.com>,
	x86@kernel.org, linux-kernel@vger.kernel.org,
	Gleb Natapov <gleb@kernel.org>, Boris Petkov <bp@suse.de>,
	Tony Luck <tony.luck@intel.com>,
	Andi Kleen <andi.kleen@intel.com>,
	Ashok Raj <ashok.raj@intel.com>,
	libvir-list@redhat.com, Jiri Denemark <jdenemar@redhat.com>
Subject: Re: [PATCH v2 3/3] KVM: VMX: enable guest access to LMCE related MSRs
Date: Thu, 16 Jun 2016 11:55:46 -0300	[thread overview]
Message-ID: <20160616145546.GJ18662@thinpad.lan.raisama.net> (raw)
In-Reply-To: <1785f481-033b-2780-37b8-d27f80276d33@redhat.com>

On Thu, Jun 16, 2016 at 12:04:50PM +0200, Paolo Bonzini wrote:
> On 16/06/2016 08:05, Haozhong Zhang wrote:
> > From: Ashok Raj <ashok.raj@intel.com>
> > 
> > On Intel platforms, this patch adds LMCE to KVM MCE supported
> > capabilities and handles guest access to LMCE related MSRs.
> > 
> > Signed-off-by: Ashok Raj <ashok.raj@intel.com>
> > [Haozhong: macro KVM_MCE_CAP_SUPPORTED => variable kvm_mce_cap_supported
> >            Only enable LMCE on Intel platform
> > 	   Check MSR_IA32_FEATURE_CONTROL when handling guest
> > 	     access to MSR_IA32_MCG_EXT_CTL]
> > Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>
[...]
> > @@ -6433,6 +6455,8 @@ static __init int hardware_setup(void)
> >  
> >  	kvm_set_posted_intr_wakeup_handler(wakeup_handler);
> >  
> > +	kvm_mce_cap_supported |= MCG_LMCE_P;
> 
> Ah, so virtual LMCE is available on all processors!  This is
> interesting, but it also makes it more complicated to handle in QEMU; a
> new QEMU generally doesn't require a new kernel.
> 
> Eduardo, any ideas?

(CCing libvirt list)

As we shouldn't make machine-type changes introduce new host
requirements, it looks like we need to either add a new set of
CPU models (unreasonable), or expect management software to
explicitly enable LMCE after ensuring the host supports it.

Or we could wait for a reasonable time after the feature is
available in the kernel, and declare that QEMU as a whole
requires a newer kernel. But how much time would be reasonable
for that?

Long term, I believe we should think of a better solution. I
don't think it is reasonable to require new libvirt code to be
written for every single low-level feature that requires a newer
kernel or newer host hardware. Maybe new introspection interfaces
that would allow us to drop the "no new requirements on
machine-type changes" rule?

-- 
Eduardo

  parent reply	other threads:[~2016-06-16 14:56 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-16  6:05 [PATCH v2 0/3] Add KVM support for Intel local MCE Haozhong Zhang
2016-06-16  6:05 ` [PATCH v2 1/3] KVM: VMX: move msr_ia32_feature_control to vcpu_vmx Haozhong Zhang
2016-06-16 11:49   ` Borislav Petkov
2016-06-16 11:57     ` Paolo Bonzini
2016-06-16 11:57     ` Haozhong Zhang
2016-06-16  6:05 ` [PATCH v2 2/3] KVM: VMX: validate individual bits of guest MSR_IA32_FEATURE_CONTROL Haozhong Zhang
2016-06-16  9:55   ` Paolo Bonzini
2016-06-16 11:21     ` Haozhong Zhang
2016-06-16 10:01   ` Paolo Bonzini
2016-06-16 11:16     ` Haozhong Zhang
2016-06-16 11:19       ` Paolo Bonzini
2016-06-16 11:29         ` Haozhong Zhang
2016-06-16  6:05 ` [PATCH v2 3/3] KVM: VMX: enable guest access to LMCE related MSRs Haozhong Zhang
2016-06-16 10:04   ` Paolo Bonzini
2016-06-16 10:49     ` Haozhong Zhang
2016-06-16 14:55     ` Eduardo Habkost [this message]
2016-06-17  1:11       ` Haozhong Zhang
2016-06-17 17:15         ` Eduardo Habkost
2016-06-20  1:49           ` Haozhong Zhang
2016-06-20  6:55             ` Paolo Bonzini

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