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From: Jean-Francois Moine <moinejf@free.fr>
To: "André Przywara" <andre.przywara@arm.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>,
	Rob Herring <robh+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	Mike Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@codeaurora.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH 00/13] arm64: Allwinner A64 support based on sunxi-ng
Date: Mon, 1 Aug 2016 10:30:24 +0200	[thread overview]
Message-ID: <20160801103024.cc74c093466d7fdfd91a2587@free.fr> (raw)
In-Reply-To: <fb559224-561c-3476-1146-96f7aea427f0@arm.com>

On Mon, 1 Aug 2016 02:43:06 +0100
André Przywara <andre.przywara@arm.com> wrote:

> As this became quite a long read, here a TL;DR:
> - We consider using an SCPI based clock system for the A64, alongside
> allwinner,simple-gates and fixed clocks. We try to avoid any Allwinner
> specific clocks (apart from the simple-gates).
> - ARM Trusted Firmware provides the SCPI implementation - for now, later
> we may move this into a possible arisc firmware.
> - We upstream some basic DT first, possibly omitting any controversial
> clock parts at all.
> 
> Let me know what you think!

Hi André,

This looks interesting.
As I understand, the clock enable/rate setting functions would be in
the arisc. The arisc firmware would be loaded only once in the Soc and
would contain the code for handling this specific SoC.
>From my calculations, this would save about 1Mb of clock descriptions
in the kernel for a universal Allwinner kernel.

But I don't see why you are keeping the simple-gates. The bus gate may
be ungated/gated when the clock is enabled/disabled, and that's what
Allwinner's software does.

-- 
Ken ar c'hentañ	|	      ** Breizh ha Linux atav! **
Jef		|		http://moinejf.free.fr/

  reply	other threads:[~2016-08-01  8:30 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-26 20:30 Maxime Ripard
2016-07-26 20:30 ` [PATCH 01/13] clk: sunxi-ng: mux: Rename mux macro to be consistent Maxime Ripard
2016-07-26 20:30 ` [PATCH 02/13] clk: sunxi-ng: mux: Add mux table support Maxime Ripard
2016-07-26 20:30 ` [PATCH 03/13] clk: sunxi-ng: sun8i: Rename DDR and video plls Maxime Ripard
2016-07-27  7:57   ` kbuild test robot
2016-07-26 20:30 ` [PATCH 04/13] clk: sunxi-ng: sun8i: Fix register offset Maxime Ripard
2016-07-26 20:30 ` [PATCH 05/13] clk: sunxi-ng: sun8i: Rename H3 only clocks Maxime Ripard
2016-07-26 20:30 ` [PATCH 06/13] clk: sunxi-ng: sun8i: Move fixed factors around Maxime Ripard
2016-07-26 20:30 ` [PATCH 07/13] clk: sunxi-ng: sun8i: Prefix clock defines by SoC Name Maxime Ripard
2016-07-26 20:30 ` [PATCH 08/13] clk: sunxi-ng: Add A64 clocks Maxime Ripard
2016-07-29 21:15   ` Rob Herring
2016-07-26 20:30 ` [PATCH 09/13] arm64: sunxi: Kconfig: add essential pinctrl driver Maxime Ripard
2016-07-26 20:30 ` [PATCH 10/13] arm64: Kconfig: sunxi: add PINCTRL Maxime Ripard
2016-07-26 20:30 ` [PATCH 11/13] Documentation: devicetree: add vendor prefix for Pine64 Maxime Ripard
2016-07-26 20:30 ` [PATCH 12/13] arm64: dts: add Allwinner A64 SoC .dtsi Maxime Ripard
2016-09-08  8:41   ` Andre Przywara
2016-09-09 20:04     ` Maxime Ripard
2016-07-26 20:30 ` [PATCH 13/13] arm64: dts: add Pine64 support Maxime Ripard
2016-07-27  8:46 ` [PATCH 00/13] arm64: Allwinner A64 support based on sunxi-ng Jean-Francois Moine
2016-07-28 20:07   ` Maxime Ripard
2016-07-29  5:48     ` Jean-Francois Moine
2016-07-31  8:51       ` Maxime Ripard
2016-08-01  1:43 ` André Przywara
2016-08-01  8:30   ` Jean-Francois Moine [this message]
2016-08-01  9:13     ` Chen-Yu Tsai
2016-08-01 12:00       ` Jean-Francois Moine
2016-08-01 12:01         ` Chen-Yu Tsai
2016-08-01 12:11           ` Jean-Francois Moine
2016-08-01 10:44     ` Andre Przywara
2016-08-01  9:11   ` Chen-Yu Tsai
2016-08-11  0:36     ` André Przywara
2016-08-23 19:31   ` Maxime Ripard
2016-08-24 23:54     ` André Przywara
2016-08-26 22:18       ` Maxime Ripard

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