From: Peter Ujfalusi <peter.ujfalusi@ti.com>
To: <thierry.reding@gmail.com>, <airlied@linux.ie>, <tomi.valkeinen@ti.com>
Cc: <daniel.vetter@ffwll.ch>, <dri-devel@lists.freedesktop.org>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH 12/26] drm/omap: HDMI5: Use pointer to cfg->v_fc_config.timings in hdmi_core_video_config
Date: Thu, 1 Sep 2016 14:23:06 +0300 [thread overview]
Message-ID: <20160901112320.15246-13-peter.ujfalusi@ti.com> (raw)
In-Reply-To: <20160901112320.15246-1-peter.ujfalusi@ti.com>
By using a pointer to the omap_vode_timings struct we can unwrap lines to
make the code easier to follow.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
drivers/gpu/drm/omapdrm/dss/hdmi5_core.c | 47 ++++++++++++++------------------
1 file changed, 20 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
index 457dbd2f93a2..2baef4f7714b 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
@@ -329,13 +329,12 @@ static void hdmi_core_video_config(struct hdmi_core_data *core,
struct hdmi_core_vid_config *cfg)
{
void __iomem *base = core->base;
+ struct omap_video_timings *ovt = &cfg->v_fc_config.timings;
unsigned char r = 0;
bool vsync_pol, hsync_pol;
- vsync_pol =
- cfg->v_fc_config.timings.vsync_level == OMAPDSS_SIG_ACTIVE_HIGH;
- hsync_pol =
- cfg->v_fc_config.timings.hsync_level == OMAPDSS_SIG_ACTIVE_HIGH;
+ vsync_pol = ovt->vsync_level == OMAPDSS_SIG_ACTIVE_HIGH;
+ hsync_pol = ovt->hsync_level == OMAPDSS_SIG_ACTIVE_HIGH;
/* Set hsync, vsync and data-enable polarity */
r = hdmi_read_reg(base, HDMI_CORE_FC_INVIDCONF);
@@ -343,20 +342,16 @@ static void hdmi_core_video_config(struct hdmi_core_data *core,
r = FLD_MOD(r, hsync_pol, 5, 5);
r = FLD_MOD(r, cfg->data_enable_pol, 4, 4);
r = FLD_MOD(r, cfg->vblank_osc, 1, 1);
- r = FLD_MOD(r, cfg->v_fc_config.timings.interlace, 0, 0);
+ r = FLD_MOD(r, ovt->interlace, 0, 0);
hdmi_write_reg(base, HDMI_CORE_FC_INVIDCONF, r);
/* set x resolution */
- REG_FLD_MOD(base, HDMI_CORE_FC_INHACTIV1,
- cfg->v_fc_config.timings.hactive >> 8, 4, 0);
- REG_FLD_MOD(base, HDMI_CORE_FC_INHACTIV0,
- cfg->v_fc_config.timings.hactive & 0xFF, 7, 0);
+ REG_FLD_MOD(base, HDMI_CORE_FC_INHACTIV1, ovt->hactive >> 8, 4, 0);
+ REG_FLD_MOD(base, HDMI_CORE_FC_INHACTIV0, ovt->hactive & 0xFF, 7, 0);
/* set y resolution */
- REG_FLD_MOD(base, HDMI_CORE_FC_INVACTIV1,
- cfg->v_fc_config.timings.vactive >> 8, 4, 0);
- REG_FLD_MOD(base, HDMI_CORE_FC_INVACTIV0,
- cfg->v_fc_config.timings.vactive & 0xFF, 7, 0);
+ REG_FLD_MOD(base, HDMI_CORE_FC_INVACTIV1, ovt->vactive >> 8, 4, 0);
+ REG_FLD_MOD(base, HDMI_CORE_FC_INVACTIV0, ovt->vactive & 0xFF, 7, 0);
/* set horizontal blanking pixels */
REG_FLD_MOD(base, HDMI_CORE_FC_INHBLANK1, cfg->hblank >> 8, 4, 0);
@@ -366,30 +361,28 @@ static void hdmi_core_video_config(struct hdmi_core_data *core,
REG_FLD_MOD(base, HDMI_CORE_FC_INVBLANK, cfg->vblank, 7, 0);
/* set horizontal sync offset */
- REG_FLD_MOD(base, HDMI_CORE_FC_HSYNCINDELAY1,
- cfg->v_fc_config.timings.hfront_porch >> 8, 4, 0);
- REG_FLD_MOD(base, HDMI_CORE_FC_HSYNCINDELAY0,
- cfg->v_fc_config.timings.hfront_porch & 0xFF, 7, 0);
+ REG_FLD_MOD(base, HDMI_CORE_FC_HSYNCINDELAY1, ovt->hfront_porch >> 8,
+ 4, 0);
+ REG_FLD_MOD(base, HDMI_CORE_FC_HSYNCINDELAY0, ovt->hfront_porch & 0xFF,
+ 7, 0);
/* set vertical sync offset */
- REG_FLD_MOD(base, HDMI_CORE_FC_VSYNCINDELAY,
- cfg->v_fc_config.timings.vfront_porch, 7, 0);
+ REG_FLD_MOD(base, HDMI_CORE_FC_VSYNCINDELAY, ovt->vfront_porch, 7, 0);
/* set horizontal sync pulse width */
- REG_FLD_MOD(base, HDMI_CORE_FC_HSYNCINWIDTH1,
- (cfg->v_fc_config.timings.hsync_len >> 8), 1, 0);
- REG_FLD_MOD(base, HDMI_CORE_FC_HSYNCINWIDTH0,
- cfg->v_fc_config.timings.hsync_len & 0xFF, 7, 0);
+ REG_FLD_MOD(base, HDMI_CORE_FC_HSYNCINWIDTH1, (ovt->hsync_len >> 8),
+ 1, 0);
+ REG_FLD_MOD(base, HDMI_CORE_FC_HSYNCINWIDTH0, ovt->hsync_len & 0xFF,
+ 7, 0);
/* set vertical sync pulse width */
- REG_FLD_MOD(base, HDMI_CORE_FC_VSYNCINWIDTH,
- cfg->v_fc_config.timings.vsync_len, 5, 0);
+ REG_FLD_MOD(base, HDMI_CORE_FC_VSYNCINWIDTH, ovt->vsync_len, 5, 0);
/* select DVI mode */
REG_FLD_MOD(base, HDMI_CORE_FC_INVIDCONF,
- cfg->v_fc_config.hdmi_dvi_mode, 3, 3);
+ cfg->v_fc_config.hdmi_dvi_mode, 3, 3);
- if (cfg->v_fc_config.timings.double_pixel)
+ if (ovt->double_pixel)
REG_FLD_MOD(base, HDMI_CORE_FC_PRCONF, 2, 7, 4);
else
REG_FLD_MOD(base, HDMI_CORE_FC_PRCONF, 1, 7, 4);
--
2.9.3
next prev parent reply other threads:[~2016-09-01 11:24 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-01 11:22 [PATCH 00/26] drm/omap: Convert to use videomode from omap_video_timings Peter Ujfalusi
2016-09-01 11:22 ` [PATCH 01/26] dt-bindings: display: display-timing: Add property to configure sync drive edge Peter Ujfalusi
2016-09-12 13:05 ` Rob Herring
2016-09-12 13:22 ` Peter Ujfalusi
2016-09-01 11:22 ` [PATCH 02/26] video: display_timing: Add flags to select the edge when the sync is driven Peter Ujfalusi
2016-09-01 11:22 ` [PATCH 03/26] video: of: display_timing: Add support for syncclk-active property Peter Ujfalusi
2016-09-01 11:22 ` [PATCH 04/26] drm/omap: omap_display_timings: rename x_res to hactive Peter Ujfalusi
2016-09-15 11:58 ` Tomi Valkeinen
2016-09-01 11:22 ` [PATCH 05/26] drm/omap: omap_display_timings: rename y_res to vactive Peter Ujfalusi
2016-09-01 11:23 ` [PATCH 06/26] drm/omap: omap_display_timings: rename hsw to hsync_len Peter Ujfalusi
2016-09-01 11:23 ` [PATCH 07/26] drm/omap: omap_display_timings: rename hfp to hfront_porch Peter Ujfalusi
2016-09-01 11:23 ` [PATCH 08/26] drm/omap: omap_display_timings: rename hbp to hback_porch Peter Ujfalusi
2016-09-01 11:23 ` [PATCH 09/26] drm/omap: omap_display_timings: rename vsw to vsync_len Peter Ujfalusi
2016-09-01 11:23 ` [PATCH 10/26] drm/omap: omap_display_timings: rename vfp to vfront_porch Peter Ujfalusi
2016-09-01 11:23 ` [PATCH 11/26] drm/omap: omap_display_timings: rename vbp to vback_porch Peter Ujfalusi
2016-09-01 11:23 ` Peter Ujfalusi [this message]
2016-09-15 12:03 ` [PATCH 12/26] drm/omap: HDMI5: Use pointer to cfg->v_fc_config.timings in hdmi_core_video_config Tomi Valkeinen
2016-09-01 11:23 ` [PATCH 13/26] drm/omap: omap_display_timings: Use display_flags for interlace mode Peter Ujfalusi
2016-09-15 12:06 ` Tomi Valkeinen
2016-09-01 11:23 ` [PATCH 14/26] drm/omap: dispc: Simplify _dispc_mgr_set_lcd_timings() parameters Peter Ujfalusi
2016-09-15 12:09 ` Tomi Valkeinen
2016-09-01 11:23 ` [PATCH 15/26] drm/omap: omap_display_timings: Use display_flags for h/vsync level Peter Ujfalusi
2016-09-01 11:23 ` [PATCH 16/26] drm/omap: omap_display_timings: Use display_flags for DE level Peter Ujfalusi
2016-09-01 11:23 ` [PATCH 17/26] drm/omap: omap_display_timings: Use display_flags for double_pixel mode Peter Ujfalusi
2016-09-01 11:23 ` [PATCH 18/26] drm/omap: omap_display_timings: Use display_flags for pixel data edge Peter Ujfalusi
2016-09-01 11:23 ` [PATCH 19/26] drm/omap: omap_display_timings: Use display_flags for sync edge Peter Ujfalusi
2016-09-01 11:23 ` [PATCH 20/26] drm/omap: Change the types of struct omap_video_timings members Peter Ujfalusi
2016-09-01 11:23 ` [PATCH 21/26] drm/omap: Replace struct omap_video_timings with videomode Peter Ujfalusi
2016-09-01 11:23 ` [PATCH 22/26] drm/omap: Use consistent name for struct videomode Peter Ujfalusi
2016-09-01 11:23 ` [PATCH 23/26] drm/omap: panel-tpo-td043mtea1: Add note for incorrect sync drive edge Peter Ujfalusi
2016-09-01 11:23 ` [PATCH 24/26] drm/omap: panel-tpo-td028ttec1: " Peter Ujfalusi
2016-09-01 11:23 ` [PATCH 25/26] drm/omap: panel-sharp-ls037v7dw01: Add note for incorrect data " Peter Ujfalusi
2016-09-01 11:23 ` [PATCH 26/26] drm/omap: panel-lgphilips-lb035q02: Add note for incorrect data drive edge and DE level Peter Ujfalusi
2016-12-14 21:32 ` [PATCH 00/26] drm/omap: Convert to use videomode from omap_video_timings Laurent Pinchart
2016-12-15 7:56 ` Tomi Valkeinen
2016-12-15 8:12 ` Peter Ujfalusi
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