From: Rabin Vincent <rabin@rab.in>
To: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: linux-kernel@vger.kernel.org, Anton Vorontsov <anton@enomsg.org>,
Colin Cross <ccross@android.com>,
Kees Cook <keescook@chromium.org>,
Tony Luck <tony.luck@intel.com>,
groeck@google.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] pstore/core: drop cmpxchg based updates
Date: Thu, 8 Sep 2016 12:23:56 +0200 [thread overview]
Message-ID: <20160908102356.GA6020@lnxartpec.se.axis.com> (raw)
In-Reply-To: <20160824130935.23110-1-bigeasy@linutronix.de>
On Wed, Aug 24, 2016 at 03:09:35PM +0200, Sebastian Andrzej Siewior wrote:
> I have here a FPGA behind PCIe which exports SRAM which I use for
> pstore. Now it seems that the FPGA no longer supports cmpxchg based
> updates and writes back 0xff…ff and returns the same. This leads to
> crash during crash rendering pstore useless.
> Since I doubt that there is much benefit from using cmpxchg() here, I am
> dropping this atomic access and use the spinlock based version.
>
> Cc: Anton Vorontsov <anton@enomsg.org>
> Cc: Colin Cross <ccross@android.com>
> Cc: Kees Cook <keescook@chromium.org>
> Cc: Tony Luck <tony.luck@intel.com>
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Tested-by: Rabin Vincent <rabinv@axis.com>
This patch is needed for pstore to work on (most?) ARMv7 chips. See
this thread for details:
https://lkml.kernel.org/g/CABXOdTfT7xMfiBvRuUS1hsVs=q5q2wY1x1Z8oCyyJNFckM0g0A@mail.gmail.com
next prev parent reply other threads:[~2016-09-08 10:24 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-24 13:09 Sebastian Andrzej Siewior
2016-09-08 10:23 ` Rabin Vincent [this message]
2016-09-08 21:32 ` Guenter Roeck
2016-09-08 22:01 ` Kees Cook
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