From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Phidias Chiang <phidias.chiang@canonical.com>
Cc: Anisse Astier <anisse@astier.eu>,
Linus Walleij <linus.walleij@linaro.org>,
Heikki Krogerus <heikki.krogerus@linux.intel.com>,
Yu C Chen <yu.c.chen@intel.com>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] pinctrl: cherryview: Do not mask all interrupts on probe
Date: Mon, 12 Sep 2016 12:04:01 +0300 [thread overview]
Message-ID: <20160912090401.GB1811@lahna.fi.intel.com> (raw)
In-Reply-To: <20160912065656.GA2411@ktx>
On Mon, Sep 12, 2016 at 02:56:56PM +0800, Phidias Chiang wrote:
> On Sun, Sep 11, 2016 at 11:05:06AM +0300, Mika Westerberg wrote:
> > On Fri, Sep 09, 2016 at 11:58:32AM +0300, Mika Westerberg wrote:
> > > On Fri, Sep 09, 2016 at 04:23:58PM +0800, Phidias Chiang wrote:
> > >
> > > Only other place where we touch INTMASK register is
> > > chv_gpio_irq_mask_unmask(). Can you add some debug there to find out the
> > > caller?
> >
> > Something like this:
> >
> > diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c
> > index 0fe8fad..95fa3b1 100644
> > --- a/drivers/pinctrl/intel/pinctrl-cherryview.c
> > +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c
> > @@ -1357,6 +1357,11 @@ static void chv_gpio_irq_mask_unmask(struct irq_data *d, bool mask)
> > value |= BIT(intr_line);
> > chv_writel(value, pctrl->regs + CHV_INTMASK);
> >
> > + if (printk_ratelimit()) {
> > + dev_info(pctrl->dev, "%smask pin %u intmask 0x%08x\n",
> > + mask ? "" : "un", pin, readl(pctrl->regs + CHV_INTMASK));
> > + }
> > +
> > raw_spin_unlock_irqrestore(&chv_lock, flags);
> > }
> >
>
> With printk_ratelimit():
>
> [ 2.058485] cherryview-pinctrl INT33FF:00: INTMASK0: 0x00000006
> [ 2.058513] cherryview-pinctrl INT33FF:00: mask pin 0 intmask 0x00000006
> [ 2.058533] cherryview-pinctrl INT33FF:00: mask pin 1 intmask 0x00000006
> [ 2.058551] cherryview-pinctrl INT33FF:00: mask pin 2 intmask 0x00000006
> [ 2.058569] cherryview-pinctrl INT33FF:00: mask pin 3 intmask 0x00000006
> [ 2.058587] cherryview-pinctrl INT33FF:00: mask pin 4 intmask 0x00000006
> [ 2.058604] cherryview-pinctrl INT33FF:00: mask pin 5 intmask 0x00000006
> [ 2.058623] cherryview-pinctrl INT33FF:00: mask pin 6 intmask 0x00000006
> [ 2.058641] cherryview-pinctrl INT33FF:00: mask pin 7 intmask 0x00000006
> [ 2.058663] cherryview-pinctrl INT33FF:00: mask pin 15 intmask 0x00000006
> [ 2.059401] cherryview-pinctrl INT33FF:00: INTMASK1: 0x00000000
> [ 2.059551] cherryview-pinctrl INT33FF:01: INTMASK0: 0x00004000
> [ 2.061272] cherryview-pinctrl INT33FF:01: INTMASK1: 0x00000000
> [ 2.061516] cherryview-pinctrl INT33FF:02: INTMASK0: 0x00000000
> [ 2.061906] cherryview-pinctrl INT33FF:02: INTMASK1: 0x00000000
> [ 2.062116] cherryview-pinctrl INT33FF:03: INTMASK0: 0x00000000
> [ 2.062956] cherryview-pinctrl INT33FF:03: INTMASK1: 0x00000000
>
> w/o printk_ratelimit():
> http://pastebin.com/dLDELDB4
>
> The main difference is the intmask turns to 0x4 on pin 75 and 0x0
> afterwards for INT33FF:00. And same thing happened with :01 on pin 25
OK, I see what is going on now. When I changed handle_simple_irq to
handle_bad_irq, the IRQ core in __irq_do_set_handler() thinks the
handler is uninstalled and masks the line.
If you change handle_bad_irq to handle_simple_irq, in call to
gpiochip_irqchip_add(), does it work then?
next prev parent reply other threads:[~2016-09-12 9:04 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-22 7:56 Mika Westerberg
2015-06-01 9:23 ` Mika Westerberg
2015-06-02 13:53 ` Linus Walleij
2015-06-02 14:15 ` Mika Westerberg
2016-08-16 16:12 ` Anisse Astier
2016-08-17 8:13 ` Mika Westerberg
2016-08-17 13:42 ` Anisse Astier
2016-08-18 12:13 ` Mika Westerberg
2016-08-18 13:52 ` Anisse Astier
2016-08-18 13:58 ` Mika Westerberg
2016-09-08 10:13 ` Phidias Chiang
2016-09-08 10:24 ` Mika Westerberg
2016-09-08 16:28 ` Phidias Chiang
2016-09-09 6:18 ` Mika Westerberg
2016-09-09 8:23 ` Phidias Chiang
2016-09-09 8:58 ` Mika Westerberg
2016-09-11 8:05 ` Mika Westerberg
2016-09-12 6:56 ` Phidias Chiang
2016-09-12 9:04 ` Mika Westerberg [this message]
2016-09-12 13:04 ` Phidias Chiang
2016-09-12 13:11 ` Mika Westerberg
2016-09-13 9:18 ` Linus Walleij
2016-09-13 9:33 ` Mika Westerberg
2016-09-13 12:22 ` Linus Walleij
2016-09-13 12:52 ` Mika Westerberg
2016-09-13 20:57 ` Linus Walleij
2016-09-14 8:26 ` Mika Westerberg
2016-09-14 12:46 ` Linus Walleij
2016-09-14 15:12 ` Mika Westerberg
2016-09-15 12:39 ` Linus Walleij
2016-09-15 15:42 ` Mika Westerberg
2016-09-15 15:52 ` [PATCH 1/2] gpiolib: Add possibility to mask which GPIOs are added to IRQ domain Mika Westerberg
2016-09-15 15:52 ` [PATCH 2/2] pinctrl: cherryview: Do not add all southwest and north GPIOs " Mika Westerberg
2016-09-15 16:07 ` [PATCH 1/2] gpiolib: Add possibility to mask which GPIOs are added " Marc Zyngier
2016-09-15 18:12 ` Mika Westerberg
2016-09-15 18:50 ` Thomas Gleixner
2016-09-18 11:16 ` Linus Walleij
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