From: Yazen Ghannam <yazen.ghannam@amd.com>
To: Borislav Petkov <bp@suse.de>
Cc: <linux-kernel@vger.kernel.org>, <x86@kernel.org>,
<stable@vger.kernel.org>
Subject: Re: [PATCH v2 1/2] x86/AMD: Fix cpu_llc_id for AMD Fam17h systems
Date: Mon, 31 Oct 2016 15:15:44 -0400 [thread overview]
Message-ID: <20161031191544.GA5862@yaz-fedora.dyhomenet> (raw)
In-Reply-To: <20161028165740.eizolvqnq5xh3azh@pd.tnic>
> > The current Fam17h cpu_llc_id derivation has an underflow bug when
> ^
> (Last Level Cache ID)
>
> Let's write it out the first time.
>
Ack.
> >
> > The apicid decoding is fixed for bits 3 and above,
> ^
> "is fixed ... in register... "
>
Ack.
> > which give the core
> > complex, node and socket IDs. The LLC is at the core complex level so we
> > can find a unique cpu_llc_id by right shifting the apicid by 3.
>
> "... because then the LSBit will be the Core Complex ID."
>
Ack.
> > We can fix the underflow bug and simplify the code by replacing the
> > current cpu_llc_id derivation with a right shift.
> >
> > Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com>
> > Cc: <stable@vger.kernel.org> # v4.4..
> > Fixes: 3849e91f571d ("x86/AMD: Fix last level cache topology for AMD Fam17h systems")
> > ---
>
> I'll run it soon.
>
Thanks,
Yazen
prev parent reply other threads:[~2016-10-31 19:30 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-28 15:51 Yazen Ghannam
2016-10-28 15:51 ` [PATCH v2 2/2] x86/AMD: Group cpu_llc_id assignment by topology feature and family Yazen Ghannam
2016-10-28 19:56 ` Borislav Petkov
2016-10-31 19:22 ` Yazen Ghannam
2016-10-31 21:55 ` Borislav Petkov
2016-10-28 16:57 ` [PATCH v2 1/2] x86/AMD: Fix cpu_llc_id for AMD Fam17h systems Borislav Petkov
2016-10-31 19:15 ` Yazen Ghannam [this message]
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