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From: Mark Rutland <mark.rutland@arm.com>
To: Anurup M <anurupvasu@gmail.com>
Cc: robh+dt@kernel.org, gregkh@linuxfoundation.org,
	catalin.marinas@arm.com, arnd@arndb.de, geert+renesas@glider.be,
	davem@davemloft.net, akpm@linux-foundation.org, corbet@lwn.net,
	will.deacon@arm.com, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	anurup.m@huawei.com, zhangshaokun@hisilicon.com,
	tanxiaojun@huawei.com, xuwei5@hisilicon.com,
	sanil.kumar@hisilicon.com, john.garry@huawei.com,
	gabriele.paoloni@huawei.com, shiju.jose@huawei.com,
	wangkefeng.wang@huawei.com, linuxarm@huawei.com,
	shyju.pv@huawei.com
Subject: Re: [PATCH v3 00/10] perf: arm64: Support for Hisilicon SoC Hardware event counters
Date: Tue, 10 Jan 2017 17:43:11 +0000	[thread overview]
Message-ID: <20170110174311.GB24036@leverpostej> (raw)
In-Reply-To: <1483339672-23778-1-git-send-email-anurup.m@huawei.com>

Hi,

On Mon, Jan 02, 2017 at 01:47:52AM -0500, Anurup M wrote:
> ToDo:
> 1) The counter overflow handling is currently unsupported in this
>    patch series.

>From a quick scan of the patches, I see mention of an interrupt in a
comment the driver, but there's noething in the DT binding.

Is there an overflow interrupt at all?

Or do you need to implement polling to avoid overflow?

This is a prerequisite for merging the driver.

Thanks,
Mark.

  reply	other threads:[~2017-01-10 17:44 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-02  6:47 Anurup M
2017-01-10 17:43 ` Mark Rutland [this message]
2017-01-12  6:27   ` Anurup M

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