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* Re: [PATCH v6 1/4] clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driver
       [not found] ` <20170301201342.47583-2-icenowy@aosc.xyz>
@ 2017-03-02 13:55   ` Maxime Ripard
  0 siblings, 0 replies; 2+ messages in thread
From: Maxime Ripard @ 2017-03-02 13:55 UTC (permalink / raw)
  To: Icenowy Zheng
  Cc: Chen-Yu Tsai, Rob Herring, Andre Przywara, linux-clk, devicetree,
	linux-arm-kernel, linux-kernel, linux-sunxi

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On Thu, Mar 02, 2017 at 04:13:39AM +0800, Icenowy Zheng wrote:
> Allwinner H5 is a SoC that features a design which keeps the peripheral
> compatible with H3, so that it have also a CCU like the one on H3 --
> only one bus gate/reset is added, and the mmc sample/output phases are
> removed because of MMC controller update.
> 
> Add its support in our existing H3 CCU driver.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>

Applied, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] arm: dts: sun8i: split Allwinner H3 .dtsi
       [not found] ` <20170301201342.47583-3-icenowy@aosc.xyz>
@ 2017-03-02 13:58   ` Maxime Ripard
  0 siblings, 0 replies; 2+ messages in thread
From: Maxime Ripard @ 2017-03-02 13:58 UTC (permalink / raw)
  To: Icenowy Zheng
  Cc: Chen-Yu Tsai, Rob Herring, Andre Przywara, linux-clk, devicetree,
	linux-arm-kernel, linux-kernel, linux-sunxi

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On Thu, Mar 02, 2017 at 04:13:40AM +0800, Icenowy Zheng wrote:
> From: Andre Przywara <andre.przywara@arm.com>
> 
> The new Allwinner H5 SoC is pin-compatible to the H3 SoC, but with the
> Cortex-A7 cores replaced by Cortex-A53 cores and the MMC controller
> updated. So we should really share almost the whole .dtsi.
> In preparation for that move the peripheral parts of the existing
> sun8i-h3.dtsi into a new sunxi-h3-h5.dtsi.
> The actual sun8i-h3.dtsi then includes that and defines the H3 specific
> parts on top of it.
> According to "Allwinner H3 Datasheet Version 1.2 Apr. 23, 2015" [1]
> Chapter 4.12. GIC and "Allwinner H5 Datasheet Revision 1.0 May. 20,
> 2016" [2] Chapter 4.12. GIC, the two SoCs both use ARM GIC-400 interrupt
> controller (see the "Note" after the interrupt source table), so the GIC
> node is extracted to sunxi-h3-h5.dtsi as well, and the compatible is
> changed to "arm,gic-400".

This should be in a separate patch.

> On the way get rid of skeleton.dtsi, as recommended in that very file.

That too.

> The inclusion of pinctrl-a10.h is also dropped, as it's now not needed
> at all after changing pinctrl binding to the generic pinconf binding.

And that as well...

> [1] http://linux-sunxi.org/File:Allwinner_H3_Datasheet_V1.2.pdf
> [2] https://github.com/OrangePiLibra/OrangePi_H5SDK/blob/master/Documentation/Hardware/H5_User_Manual.pdf

Please don't put URLs in commit logs.

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2017-03-02 14:02 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
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     [not found] <20170301201342.47583-1-icenowy@aosc.xyz>
     [not found] ` <20170301201342.47583-2-icenowy@aosc.xyz>
2017-03-02 13:55   ` [PATCH v6 1/4] clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driver Maxime Ripard
     [not found] ` <20170301201342.47583-3-icenowy@aosc.xyz>
2017-03-02 13:58   ` [PATCH] arm: dts: sun8i: split Allwinner H3 .dtsi Maxime Ripard

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