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From: "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>
To: patches@groups.riscv.org
Cc: Olof Johansson <olof@lixom.net>, Arnd Bergmann <arnd@arndb.de>,
	akpm@linux-foundation.org, albert@sifive.com,
	yamada.masahiro@socionext.com, mmarek@suse.com,
	will.deacon@arm.com, peterz@infradead.org, boqun.feng@gmail.com,
	mingo@redhat.com, daniel.lezcano@linaro.org, tglx@linutronix.de,
	jason@lakedaemon.net, marc.zyngier@arm.com,
	gregkh@linuxfoundation.org, jslaby@suse.com, davem@davemloft.net,
	mchehab@kernel.org, sfr@canb.auug.org.au, fweisbec@gmail.com,
	viro@zeniv.linux.org.uk, mcgrof@kernel.org, dledford@redhat.com,
	bart.vanassche@sandisk.com, sstabellini@kernel.org,
	daniel.vetter@ffwll.ch, mpe@ellerman.id.au, msalter@redhat.com,
	nicolas.dichtel@6wind.com, james.hogan@imgtec.com,
	paul.gortmaker@windriver.com, linux@roeck-us.net,
	heiko.carstens@de.ibm.com, schwidefsky@de.ibm.com,
	linux-kernel@vger.kernel.org, Palmer Dabbelt <palmer@dabbelt.com>
Subject: Re: [patches] [PATCH 17/17] RISC-V: Build Infastructure
Date: Wed, 26 Jul 2017 04:57:17 +0200	[thread overview]
Message-ID: <20170726025717.lob7jlrb6ipa6rel@latitude> (raw)
In-Reply-To: <20170712013130.14792-18-palmer@dabbelt.com>

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On Tue, Jul 11, 2017 at 06:31:30PM -0700, Palmer Dabbelt wrote:
> This patch contains all the build infastructure that actually enables
> the RISC-V port.  This includes Makefiles, linker scripts, and Kconfig
> files.  It also contains the only top-level change, which adds RISC-V to
> the list of architectures that need a sed run to produce the ARCH
> variable when building locally.
> 
> Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
> ---
[...]
> +config ISA_C
> +	bool "Emit compressed instructions when building Linux"

As a user, I'd prefer to have slightly more globally-recognisable names
than ISA_<single letter> for RISC-V instruction set architecture
extensions. A quick "git grep -A2 'config ISA'" shows the following
Kconfig symbols:

* ISA, ISA_BUS_API, ISA_DMA_API, ISAPNP:
  Settings related to the historic ISA bus.
* ISA_ARCOMPACT/ISA_ARCV2 (arch/arc),
  ISA_M32R/ISA_M32R2/ISA_DSP_LEVEL2/ISA_DUAL_ISSUE (arch/m32r):
  Instruction set options.

Four out of the six instruction set options have ARC/M32R in the name,
and I think that makes things slightly more readable. Therefore I
humbly propose something longer, and with a hint of RISC-V in the name,
such as ISA_RVC.

(Take this with a grain of salt, perhaps.)


Jonathan Neuschäfer

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  reply	other threads:[~2017-07-26  2:59 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-12  1:31 RISC-V Linux Port v6 Palmer Dabbelt
2017-07-12  1:31 ` [PATCH 01/17] lib: Add shared copies of some GCC library routines Palmer Dabbelt
2017-07-12  1:31 ` [PATCH 02/17] pci: Add a generic, weakly-linked pcibios_align_resource Palmer Dabbelt
2017-07-12 13:41   ` Luis R. Rodriguez
2017-07-12 22:50   ` Bjorn Helgaas
2017-07-13 18:30     ` Palmer Dabbelt
2017-07-14  3:19   ` kbuild test robot
2017-07-12  1:31 ` [PATCH 03/17] pci: Add a generic, weakly-linked pcibios_fixup_bus Palmer Dabbelt
2017-07-12  1:31 ` [PATCH 04/17] MAINTAINERS: Add RISC-V Palmer Dabbelt
2017-07-12 11:16   ` James Hogan
2017-07-12 11:31     ` Arnd Bergmann
2017-07-12 14:51       ` [patches] " Jonathan Neuschäfer
2017-07-12  1:31 ` [PATCH 05/17] clocksource: New RISC-V SBI timer driver Palmer Dabbelt
2017-07-12  1:31 ` [PATCH 06/17] irqchip: RISC-V Local Interrupt Controller Driver Palmer Dabbelt
2017-07-12  1:31 ` [PATCH 07/17] irqchip: New RISC-V PLIC Driver Palmer Dabbelt
2017-07-12  1:31 ` [PATCH 08/17] tty: New RISC-V SBI console driver Palmer Dabbelt
2017-07-12  1:31 ` [PATCH 09/17] RISC-V: Init and Halt Code Palmer Dabbelt
2017-07-12  1:31 ` [PATCH 10/17] RISC-V: Atomic and Locking Code Palmer Dabbelt
2017-07-12 12:40   ` Boqun Feng
2017-07-12 12:44     ` Boqun Feng
2017-07-12 12:49     ` Peter Zijlstra
2017-07-12 17:17     ` Palmer Dabbelt
2017-07-12 13:13   ` Arnd Bergmann
2017-07-12  1:31 ` [PATCH 11/17] RISC-V: Generic library routines and assembly Palmer Dabbelt
2017-07-12  1:31 ` [PATCH 12/17] RISC-V: ELF and module implementation Palmer Dabbelt
2017-07-12  1:31 ` [PATCH 13/17] RISC-V: Task implementation Palmer Dabbelt
2017-07-12  1:31 ` [PATCH 14/17] RISC-V: Device, timer, IRQs, and the SBI Palmer Dabbelt
2017-07-12  1:31 ` [PATCH 15/17] RISC-V: Paging and MMU Palmer Dabbelt
2017-07-12  1:31 ` [PATCH 16/17] RISC-V: User-facing API Palmer Dabbelt
2017-07-12 11:07   ` James Hogan
2017-07-12 16:24     ` Palmer Dabbelt
2017-07-12 17:09       ` James Hogan
2017-07-13 21:50         ` Palmer Dabbelt
2017-07-12  1:31 ` [PATCH 17/17] RISC-V: Build Infastructure Palmer Dabbelt
2017-07-26  2:57   ` Jonathan Neuschäfer [this message]
2017-07-26  5:20     ` [patches] " Palmer Dabbelt
2017-07-26  6:52       ` Arnd Bergmann
2017-07-26 18:37       ` Jonathan Neuschäfer
2017-07-12  7:58 ` RISC-V Linux Port v6 Arnd Bergmann
2017-07-12 13:53   ` Luis R. Rodriguez
2017-07-12 17:55   ` Will Deacon
2017-07-12 19:34     ` Arnd Bergmann

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