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From: Harry Pan <harry.pan@intel.com>
To: LKML <linux-kernel@vger.kernel.org>
Cc: gs0622@gmail.com, Harry Pan <harry.pan@intel.com>,
	tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com,
	x86@kernel.org, peterz@infradead.org, davidcc@google.com,
	bp@suse.de, lukasz.odzioba@intel.com, piotr.luc@intel.com,
	srinivas.pandruvada@linux.intel.com
Subject: [PATCH] perf/x86/intel/cstate: revise package C-state residency of SKL/KBL
Date: Fri,  1 Sep 2017 17:39:08 +0800	[thread overview]
Message-ID: <20170901093908.11123-1-harry.pan@intel.com> (raw)

Despite Intel SDM vol-4 does not claim to have there MSRs,
EDS of SKL/KBL do claim to have PC8/PC9/PC10 states,
also these residency MSRs are visible through rdmsr.

This patch allows developers to calculate correct portions
among various package C-states against total TSC ticks, and
this would also align the events w/ Len Brown's turbostat
metrics on SKL/KBL platforms.

Signed-off-by: Harry Pan <harry.pan@intel.com>
---
 arch/x86/events/intel/cstate.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c
index 4cf100ff2a37..8f339635d22b 100644
--- a/arch/x86/events/intel/cstate.c
+++ b/arch/x86/events/intel/cstate.c
@@ -75,15 +75,15 @@
  *			       Scope: Package (physical package)
  *	MSR_PKG_C8_RESIDENCY:  Package C8 Residency Counter.
  *			       perf code: 0x04
- *			       Available model: HSW ULT only
+ *			       Available model: HSW ULT,SKL,KBL
  *			       Scope: Package (physical package)
  *	MSR_PKG_C9_RESIDENCY:  Package C9 Residency Counter.
  *			       perf code: 0x05
- *			       Available model: HSW ULT only
+ *			       Available model: HSW ULT,SKL,KBL
  *			       Scope: Package (physical package)
  *	MSR_PKG_C10_RESIDENCY: Package C10 Residency Counter.
  *			       perf code: 0x06
- *			       Available model: HSW ULT, GLM
+ *			       Available model: HSW ULT,GLM,SKL,KBL
  *			       Scope: Package (physical package)
  *
  */
@@ -550,11 +550,11 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
 	X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL_GT3E,   snb_cstates),
 	X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL_X,      snb_cstates),
 
-	X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_MOBILE,  snb_cstates),
-	X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_DESKTOP, snb_cstates),
+	X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_MOBILE,  hswult_cstates),
+	X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_DESKTOP, hswult_cstates),
 
-	X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_MOBILE,  snb_cstates),
-	X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_DESKTOP, snb_cstates),
+	X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_MOBILE,  hswult_cstates),
+	X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_DESKTOP, hswult_cstates),
 
 	X86_CSTATES_MODEL(INTEL_FAM6_XEON_PHI_KNL, knl_cstates),
 	X86_CSTATES_MODEL(INTEL_FAM6_XEON_PHI_KNM, knl_cstates),
-- 
2.12.2

                 reply	other threads:[~2017-09-01 12:35 UTC|newest]

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