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From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Bin Meng <bmeng.cn@gmail.com>
Cc: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>,
	Marek Vasut <marek.vasut@gmail.com>,
	Boris Brezillon <boris.brezillon@free-electrons.com>,
	Brian Norris <computersforpeace@gmail.com>,
	Richard Weinberger <richard@nod.at>,
	David Woodhouse <dwmw2@infradead.org>,
	linux-mtd <linux-mtd@lists.infradead.org>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	Stefan Roese <sr@denx.de>
Subject: Re: [PATCH 00/10] spi-nor: intel-spi: Various fixes and enhancements
Date: Fri, 1 Sep 2017 13:09:19 +0300	[thread overview]
Message-ID: <20170901100919.GZ2598@lahna.fi.intel.com> (raw)
In-Reply-To: <1504252841-2445-1-git-send-email-bmeng.cn@gmail.com>

On Fri, Sep 01, 2017 at 01:00:31AM -0700, Bin Meng wrote:
> This series does several bug fixes and clean ups against the intel-spi
> spi-nor driver, as well as enhancements to make the driver independent
> on the underlying BIOS/bootloader.
> 
> At present the driver uses the HW sequencer for the read/write/erase on
> all supported platforms, read_reg/write_reg for BXT, and the SW sequencer
> for read_reg/write_reg for BYT/LPT. The way the driver uses the HW and SW
> sequencer relies on some programmed register settings and hence creates
> unneeded dependencies with the underlying BIOS/bootloader. For example,
> the driver unfortunately does not work as expected when booting from
> Intel Baytrail FSP based bootloaders like U-Boot, as the Baytrail FSP
> does not set up some SPI controller settings to make the driver happy.
> Now such limitation has been removed with this series.
> 
> 
> Bin Meng (10):
>   spi-nor: intel-spi: Fix number of protected range registers for
>     BYT/LPT
>   spi-nor: intel-spi: Remove useless 'buf' parameter in the HW/SW cycle
>   spi-nor: intel-spi: Fix broken software sequencing codes
>   spi-nor: intel-spi: Check transfer length in the HW/SW cycle
>   spi-nor: intel-spi: Use SW sequencer for BYT/LPT
>   spi-nor: intel-spi: Remove 'Atomic Cycle Sequence' in
>     intel_spi_write()
>   spi-nor: intel-spi: Don't assume OPMENU0/1 to be programmed by BIOS
>   spi-nor: intel-spi: Remove the unnecessary HSFSTS register RW
>   spi-nor: intel-spi: Rename swseq to swseq_reg in 'struct intel_spi'
>   spi-nor: intel-spi: Fall back to use SW sequencer to erase
> 
>  drivers/mtd/spi-nor/intel-spi.c | 209 +++++++++++++++++++++++++++++-----------
>  1 file changed, 151 insertions(+), 58 deletions(-)

Nice work!

For the whole series,

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>

      parent reply	other threads:[~2017-09-01 10:09 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-01  8:00 Bin Meng
2017-09-01  8:00 ` [PATCH 01/10] spi-nor: intel-spi: Fix number of protected range registers for BYT/LPT Bin Meng
2017-09-01  9:52   ` Marek Vasut
2017-09-11  2:46     ` Bin Meng
2017-09-01  8:00 ` [PATCH 02/10] spi-nor: intel-spi: Remove useless 'buf' parameter in the HW/SW cycle Bin Meng
2017-09-01  8:00 ` [PATCH 03/10] spi-nor: intel-spi: Fix broken software sequencing codes Bin Meng
2017-09-01  9:45   ` Mika Westerberg
2017-09-01  8:00 ` [PATCH 04/10] spi-nor: intel-spi: Check transfer length in the HW/SW cycle Bin Meng
2017-09-01  8:00 ` [PATCH 05/10] spi-nor: intel-spi: Use SW sequencer for BYT/LPT Bin Meng
2017-09-01  8:00 ` [PATCH 06/10] spi-nor: intel-spi: Remove 'Atomic Cycle Sequence' in intel_spi_write() Bin Meng
2017-09-01  8:00 ` [PATCH 07/10] spi-nor: intel-spi: Don't assume OPMENU0/1 to be programmed by BIOS Bin Meng
2017-09-01  8:00 ` [PATCH 08/10] spi-nor: intel-spi: Remove the unnecessary HSFSTS register RW Bin Meng
2017-09-01  8:00 ` [PATCH 09/10] spi-nor: intel-spi: Rename swseq to swseq_reg in 'struct intel_spi' Bin Meng
2017-09-01  8:00 ` [PATCH 10/10] spi-nor: intel-spi: Fall back to use SW sequencer to erase Bin Meng
2017-09-01  9:52   ` Mika Westerberg
2017-09-01 10:09 ` Mika Westerberg [this message]

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