[PATCH 0/3] Drop pv_cpu_ops::wbinvd() and bring support of WBNOINVD

["Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>]

Instruction Set Extensions and Future Features Programming Reference[1] v031
introduces new WBNOINVD instruction.

The WBNOINVD instruction writes back all modified cache lines in the
processor’s internal cache to main memory and does not invalidate
(flush) the internal caches.

The patchset removes WBINVD-related dead code, add CPUID flag for the new
instruction and instrumentation to call it.

No users for the code introduced, but we are planning to use it for
Multi-Key Total Memory Encryption[2] enabling.

[1] https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
[2] https://software.intel.com/sites/default/files/managed/a5/16/Multi-Key-Total-Memory-Encryption-Spec.pdf

Kirill A. Shutemov (3):
  x86/paravirt: Drop pv_cpu_ops::wbinvd()
  x86/cpufeatures: Add WBNOINVD cpufeature
  x86/asm: Add support for WBNOINVD instruction

 arch/x86/include/asm/cpufeatures.h    |  3 ++-
 arch/x86/include/asm/paravirt.h       |  5 -----
 arch/x86/include/asm/paravirt_types.h |  1 -
 arch/x86/include/asm/smp.h            | 10 ++++++++++
 arch/x86/include/asm/special_insns.h  | 12 ++++++------
 arch/x86/kernel/paravirt.c            |  1 -
 arch/x86/kernel/paravirt_patch_64.c   |  2 --
 arch/x86/lib/cache-smp.c              | 17 +++++++++++++++++
 arch/x86/xen/enlighten_pv.c           |  2 --
 9 files changed, 35 insertions(+), 18 deletions(-)

-- 
2.15.1