From: Thomas Gleixner <tglx@linutronix.de>
To: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
x86@kernel.org, linux-kernel@vger.kernel.org,
Dave Hansen <dave.hansen@intel.com>
Subject: Re: [PATCH 2/3] x86/cpufeatures: Add WBNOINVD cpufeature
Date: Thu, 15 Mar 2018 10:17:08 +0100 (CET) [thread overview]
Message-ID: <alpine.DEB.2.21.1803151015330.1525@nanos.tec.linutronix.de> (raw)
In-Reply-To: <20180119121821.77018-3-kirill.shutemov@linux.intel.com>
[-- Attachment #1: Type: text/plain, Size: 457 bytes --]
On Fri, 19 Jan 2018, Kirill A. Shutemov wrote:
> CPUID.0x80000008:EBX[9] indicates whether CPU supports WBNOINVD
> instruction.
>
> The WBNOINVD instruction writes back all modified cache lines in the
> processor’s internal cache to main memory and does not invalidate
> (flush) the internal caches.
That's describing what that instruction does. Could you please explain why
this is useful and what kind of usage you envision for that.
Thanks,
tglx
next prev parent reply other threads:[~2018-03-15 9:17 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-19 12:18 [PATCH 0/3] Drop pv_cpu_ops::wbinvd() and bring support of WBNOINVD Kirill A. Shutemov
2018-01-19 12:18 ` [PATCH 1/3] x86/paravirt: Drop pv_cpu_ops::wbinvd() Kirill A. Shutemov
2018-01-19 12:18 ` [PATCH 2/3] x86/cpufeatures: Add WBNOINVD cpufeature Kirill A. Shutemov
2018-03-15 9:17 ` Thomas Gleixner [this message]
2018-01-19 12:18 ` [PATCH 3/3] x86/asm: Add support for WBNOINVD instruction Kirill A. Shutemov
2018-03-15 9:21 ` Thomas Gleixner
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