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From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: bhelgaas@google.com, Joao.Pinto@synopsys.com,
	jingoohan1@gmail.com, kishon@ti.com, robh+dt@kernel.org,
	mark.rutland@arm.com, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v2 6/9] PCI: dwc: Define maximum number of vectors
Date: Mon, 9 Apr 2018 17:03:56 +0100	[thread overview]
Message-ID: <20180409160356.GA14533@e107981-ln.cambridge.arm.com> (raw)
In-Reply-To: <bf7062c863f33b2951acc586b1f22d3497ee2f10.1523266508.git.gustavo.pimentel@synopsys.com>

On Mon, Apr 09, 2018 at 10:41:15AM +0100, Gustavo Pimentel wrote:
> Adds a callback that defines the maximum number of vectors that can be use
> by the Root Complex.
> 
> Since this is a parameter associated to each SoC IP setting, makes sense to
> be configurable and easily visible to future modifications.
> 
> The designware IP supports a maximum of 256 vectors.

I think that a DT property instead of a callback would have made more
sense - I struggle to see the point in defining a callback to initialize
a variable, this can be done in the generic dwc code (and a DT binding).

Lorenzo

> Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
> ---
> Change v1->v2:
> - Nothing changed, just to follow the patch set version.
> 
>  drivers/pci/dwc/pcie-designware-plat.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/pci/dwc/pcie-designware-plat.c b/drivers/pci/dwc/pcie-designware-plat.c
> index 5382a7a..94da252 100644
> --- a/drivers/pci/dwc/pcie-designware-plat.c
> +++ b/drivers/pci/dwc/pcie-designware-plat.c
> @@ -48,8 +48,14 @@ static int dw_plat_pcie_host_init(struct pcie_port *pp)
>  	return 0;
>  }
>  
> +static void dw_plat_set_num_vectors(struct pcie_port *pp)
> +{
> +	pp->num_vectors = MAX_MSI_IRQS;
> +}
> +
>  static const struct dw_pcie_host_ops dw_plat_pcie_host_ops = {
>  	.host_init = dw_plat_pcie_host_init,
> +	.set_num_vectors = dw_plat_set_num_vectors,
>  };
>  
>  static int dw_plat_pcie_establish_link(struct dw_pcie *pci)
> -- 
> 2.7.4
> 
> 

  reply	other threads:[~2018-04-09 16:04 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-09  9:41 [PATCH v2 0/9] Designware EP support and code clean up Gustavo Pimentel
2018-04-09  9:41 ` [PATCH v2 1/9] bindings: PCI: designware: Example update Gustavo Pimentel
2018-04-09  9:41 ` [PATCH v2 2/9] PCI: dwc: Add support for endpoint mode Gustavo Pimentel
2018-04-10  5:12   ` Kishon Vijay Abraham I
2018-04-10 10:36     ` Gustavo Pimentel
2018-04-10 11:09       ` Kishon Vijay Abraham I
2018-04-09  9:41 ` [PATCH v2 3/9] bindings: PCI: designware: Add support for the EP in Designware driver Gustavo Pimentel
2018-04-09  9:41 ` [PATCH v2 4/9] PCI: Adds device ID for Synopsys Sample Endpoint Gustavo Pimentel
2018-04-09  9:41 ` [PATCH v2 5/9] misc: pci_endpoint_test: Add designware EP entry Gustavo Pimentel
2018-04-09  9:41 ` [PATCH v2 6/9] PCI: dwc: Define maximum number of vectors Gustavo Pimentel
2018-04-09 16:03   ` Lorenzo Pieralisi [this message]
2018-04-10  7:59     ` Gustavo Pimentel
2018-04-10  9:56       ` Lorenzo Pieralisi
2018-04-09  9:41 ` [PATCH v2 7/9] PCI: dwc: Replace lower into upper case characters Gustavo Pimentel
2018-04-09 10:25   ` Joe Perches
2018-04-09 13:10     ` Gustavo Pimentel
2018-04-09 14:25       ` Joe Perches
2018-04-11  0:05   ` Jingoo Han
2018-04-09  9:41 ` [PATCH v2 8/9] PCI: dwc: Small computation improvement Gustavo Pimentel
2018-04-11  0:01   ` Jingoo Han
2018-04-11  7:40     ` Gustavo Pimentel
2018-04-11 19:37       ` Jingoo Han
2018-04-16  8:41         ` Gustavo Pimentel
2018-04-15 13:09       ` Fabio Estevam
2018-04-16  8:35         ` Gustavo Pimentel
2018-04-09  9:41 ` [PATCH v2 9/9] PCI: dwc: Replace magic number by defines Gustavo Pimentel
2018-04-11  0:07   ` Jingoo Han

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