* [GIT PULL 2/3] intel_th: Fix resource handling for ACPI glue layer
2018-09-18 13:10 [GIT PULL 0/3] intel_th: Fixes for v4.19 Alexander Shishkin
2018-09-18 13:10 ` [GIT PULL 1/3] intel_th: Fix device removal logic Alexander Shishkin
@ 2018-09-18 13:10 ` Alexander Shishkin
2018-09-18 13:10 ` [GIT PULL 3/3] intel_th: pci: Add Ice Lake PCH support Alexander Shishkin
2 siblings, 0 replies; 4+ messages in thread
From: Alexander Shishkin @ 2018-09-18 13:10 UTC (permalink / raw)
To: Greg Kroah-Hartman; +Cc: linux-kernel, Alexander Shishkin, stable
The core of the driver expects the resource array from the glue layer
to be indexed by even numbers, as is the case for 64-bit PCI resources.
This doesn't hold true for others, ACPI in this instance, which leads
to an out-of-bounds access and an ioremap() on whatever address that
access fetches.
This patch fixes the problem by reading resource array differently based
on whether the 64-bit flag is set, which would indicate PCI glue layer.
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Fixes: ebc57e399b8e ("intel_th: Add ACPI glue layer")
CC: stable@vger.kernel.org # v4.17+
---
drivers/hwtracing/intel_th/core.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/hwtracing/intel_th/core.c b/drivers/hwtracing/intel_th/core.c
index 4e70ecee2103..fc6b7f8b62fb 100644
--- a/drivers/hwtracing/intel_th/core.c
+++ b/drivers/hwtracing/intel_th/core.c
@@ -488,7 +488,7 @@ static const struct intel_th_subdevice {
.flags = IORESOURCE_MEM,
},
{
- .start = TH_MMIO_SW,
+ .start = 1, /* use resource[1] */
.end = 0,
.flags = IORESOURCE_MEM,
},
@@ -581,6 +581,7 @@ intel_th_subdevice_alloc(struct intel_th *th,
struct intel_th_device *thdev;
struct resource res[3];
unsigned int req = 0;
+ bool is64bit = false;
int r, err;
thdev = intel_th_device_alloc(th, subdev->type, subdev->name,
@@ -590,12 +591,18 @@ intel_th_subdevice_alloc(struct intel_th *th,
thdev->drvdata = th->drvdata;
+ for (r = 0; r < th->num_resources; r++)
+ if (th->resource[r].flags & IORESOURCE_MEM_64) {
+ is64bit = true;
+ break;
+ }
+
memcpy(res, subdev->res,
sizeof(struct resource) * subdev->nres);
for (r = 0; r < subdev->nres; r++) {
struct resource *devres = th->resource;
- int bar = TH_MMIO_CONFIG;
+ int bar = 0; /* cut subdevices' MMIO from resource[0] */
/*
* Take .end == 0 to mean 'take the whole bar',
@@ -604,6 +611,8 @@ intel_th_subdevice_alloc(struct intel_th *th,
*/
if (!res[r].end && res[r].flags == IORESOURCE_MEM) {
bar = res[r].start;
+ if (is64bit)
+ bar *= 2;
res[r].start = 0;
res[r].end = resource_size(&devres[bar]) - 1;
}
--
2.18.0
^ permalink raw reply [flat|nested] 4+ messages in thread* [GIT PULL 3/3] intel_th: pci: Add Ice Lake PCH support
2018-09-18 13:10 [GIT PULL 0/3] intel_th: Fixes for v4.19 Alexander Shishkin
2018-09-18 13:10 ` [GIT PULL 1/3] intel_th: Fix device removal logic Alexander Shishkin
2018-09-18 13:10 ` [GIT PULL 2/3] intel_th: Fix resource handling for ACPI glue layer Alexander Shishkin
@ 2018-09-18 13:10 ` Alexander Shishkin
2 siblings, 0 replies; 4+ messages in thread
From: Alexander Shishkin @ 2018-09-18 13:10 UTC (permalink / raw)
To: Greg Kroah-Hartman; +Cc: linux-kernel, Alexander Shishkin
This adds Intel(R) Trace Hub PCI ID for Ice Lake PCH.
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
---
drivers/hwtracing/intel_th/pci.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/hwtracing/intel_th/pci.c b/drivers/hwtracing/intel_th/pci.c
index c2e55e5d97f6..1cf6290d6435 100644
--- a/drivers/hwtracing/intel_th/pci.c
+++ b/drivers/hwtracing/intel_th/pci.c
@@ -160,6 +160,11 @@ static const struct pci_device_id intel_th_pci_id_table[] = {
PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x18e1),
.driver_data = (kernel_ulong_t)&intel_th_2x,
},
+ {
+ /* Ice Lake PCH */
+ PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x34a6),
+ .driver_data = (kernel_ulong_t)&intel_th_2x,
+ },
{ 0 },
};
--
2.18.0
^ permalink raw reply [flat|nested] 4+ messages in thread