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From: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
To: dri-devel@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Cc: Maxime Ripard <maxime.ripard@bootlin.com>,
	David Airlie <airlied@linux.ie>, Chen-Yu Tsai <wens@csie.org>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Sean Paul <sean@poorly.run>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	linux-sunxi@googlegroups.com, Daniel Vetter <daniel@ffwll.ch>,
	Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Subject: [PATCH v3 06/21] drm/sun4i: frontend: Configure and enable YUV to RGB CSC when needed
Date: Tue,  4 Dec 2018 15:22:03 +0100	[thread overview]
Message-ID: <20181204142218.16284-7-paul.kocialkowski@bootlin.com> (raw)
In-Reply-To: <20181204142218.16284-1-paul.kocialkowski@bootlin.com>

In prevision of adding support for YUV formats, set the YUV to RGB
colorspace conversion coefficients if required and don't bypass the
CSC engine when converting.

The BT601 coefficients from the A33 BSP are copied over from the backend
code. Because of module inter-dependency, we can't have the frontend use
these coefficients from the backend directly.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
---
 drivers/gpu/drm/sun4i/sun4i_frontend.c | 45 ++++++++++++++++++++++++--
 drivers/gpu/drm/sun4i/sun4i_frontend.h |  2 ++
 2 files changed, 45 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c
index d0eca4b8784d..1737a4394401 100644
--- a/drivers/gpu/drm/sun4i/sun4i_frontend.c
+++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c
@@ -48,6 +48,28 @@ static const u32 sun4i_frontend_horz_coef[64] = {
 	0x03ff0000, 0x0000fd41, 0x01ff0000, 0x0000fe42,
 };
 
+/*
+ * These coefficients are taken from the A33 BSP from Allwinner.
+ *
+ * The first three values of each row are coded as 13-bit signed fixed-point
+ * numbers, with 10 bits for the fractional part. The fourth value is a
+ * constant coded as a 14-bit signed fixed-point number with 4 bits for the
+ * fractional part.
+ *
+ * The values in table order give the following colorspace translation:
+ * G = 1.164 * Y - 0.391 * U - 0.813 * V + 135
+ * R = 1.164 * Y + 1.596 * V - 222
+ * B = 1.164 * Y + 2.018 * U + 276
+ *
+ * This seems to be a conversion from Y[16:235] UV[16:240] to RGB[0:255],
+ * following the BT601 spec.
+ */
+static const u32 sunxi_bt601_yuv2rgb_coef[12] = {
+	0x000004a7, 0x00001e6f, 0x00001cbf, 0x00000877,
+	0x000004a7, 0x00000000, 0x00000662, 0x00003211,
+	0x000004a7, 0x00000812, 0x00000000, 0x00002eb1,
+};
+
 static void sun4i_frontend_scaler_init(struct sun4i_frontend *frontend)
 {
 	int i;
@@ -188,6 +210,8 @@ int sun4i_frontend_update_formats(struct sun4i_frontend *frontend,
 	const struct drm_format_info *format = fb->format;
 	u32 out_fmt_val;
 	u32 in_fmt_val, in_mod_val, in_ps_val;
+	unsigned int i;
+	u32 bypass;
 	int ret;
 
 	ret = sun4i_frontend_drm_format_to_input_fmt(format, &in_fmt_val);
@@ -226,9 +250,26 @@ int sun4i_frontend_update_formats(struct sun4i_frontend *frontend,
 	regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTPHASE1_REG, 0x400);
 	regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTPHASE1_REG, 0x400);
 
+	/*
+	 * Checking the input format is sufficient since we currently only
+	 * support RGB output formats to the backend. If YUV output formats
+	 * ever get supported, an YUV input and output would require bypassing
+	 * the CSC engine too.
+	 */
+	if (format->is_yuv) {
+		/* Setup the CSC engine for YUV to RGB conversion. */
+		bypass = 0;
+
+		for (i = 0; i < ARRAY_SIZE(sunxi_bt601_yuv2rgb_coef); i++)
+			regmap_write(frontend->regs,
+				     SUN4I_FRONTEND_CSC_COEF_REG(i),
+				     sunxi_bt601_yuv2rgb_coef[i]);
+	} else {
+		bypass = SUN4I_FRONTEND_BYPASS_CSC_EN;
+	}
+
 	regmap_update_bits(frontend->regs, SUN4I_FRONTEND_BYPASS_REG,
-			   SUN4I_FRONTEND_BYPASS_CSC_EN,
-			   SUN4I_FRONTEND_BYPASS_CSC_EN);
+			   SUN4I_FRONTEND_BYPASS_CSC_EN, bypass);
 
 	regmap_write(frontend->regs, SUN4I_FRONTEND_INPUT_FMT_REG,
 		     in_mod_val | in_fmt_val | in_ps_val);
diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.h b/drivers/gpu/drm/sun4i/sun4i_frontend.h
index ad146e8d8d70..326cd5607efa 100644
--- a/drivers/gpu/drm/sun4i/sun4i_frontend.h
+++ b/drivers/gpu/drm/sun4i/sun4i_frontend.h
@@ -35,6 +35,8 @@
 #define SUN4I_FRONTEND_OUTPUT_FMT_DATA_FMT_BGRX8888	1
 #define SUN4I_FRONTEND_OUTPUT_FMT_DATA_FMT_XRGB8888	2
 
+#define SUN4I_FRONTEND_CSC_COEF_REG(c)		(0x070 + (0x4 * (c)))
+
 #define SUN4I_FRONTEND_CH0_INSIZE_REG		0x100
 #define SUN4I_FRONTEND_INSIZE(h, w)			((((h) - 1) << 16) | (((w) - 1)))
 
-- 
2.19.2


  parent reply	other threads:[~2018-12-04 14:23 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-04 14:21 [PATCH v3 00/21] drm/sun4i: Support for linear and tiled YUV formats with the frontend Paul Kocialkowski
2018-12-04 14:21 ` [PATCH v3 01/21] drm/fourcc: Add format info helpers for checking YUV planes disposition Paul Kocialkowski
2018-12-04 14:21 ` [PATCH v3 02/21] drm/fourcc: Add format info helpers for checking YUV sub-sampling Paul Kocialkowski
2018-12-04 14:22 ` [PATCH v3 03/21] drm/sun4i: backend: Use explicit fourcc helpers for packed YUV422 check Paul Kocialkowski
2018-12-04 14:22 ` [PATCH v3 04/21] drm/sun4i: frontend: Pass DRM format info to input mode helper Paul Kocialkowski
2018-12-04 15:21   ` Maxime Ripard
2018-12-04 14:22 ` [PATCH v3 05/21] drm/sun4i: frontend: Determine input format based on colorspace Paul Kocialkowski
2018-12-04 14:22 ` Paul Kocialkowski [this message]
2018-12-04 15:29   ` [PATCH v3 06/21] drm/sun4i: frontend: Configure and enable YUV to RGB CSC when needed Maxime Ripard
2018-12-04 14:22 ` [PATCH v3 07/21] drm/sun4i: frontend: Add support for packed YUV422 input formats Paul Kocialkowski
2018-12-04 15:29   ` Maxime Ripard
2018-12-04 14:22 ` [PATCH v3 08/21] drm/sun4i: frontend: Add support for semi-planar YUV " Paul Kocialkowski
2018-12-04 15:30   ` Maxime Ripard
2018-12-04 14:22 ` [PATCH v3 09/21] drm/sun4i: frontend: Add support for planar " Paul Kocialkowski
2018-12-04 15:30   ` Maxime Ripard
2018-12-04 14:22 ` [PATCH v3 10/21] drm/fourcc: Add definitions for Allwinner vendor and VPU tiled format Paul Kocialkowski
2018-12-04 14:22 ` [PATCH v3 11/21] drm/sun4i: frontend: Add support for tiled YUV input mode configuration Paul Kocialkowski
2018-12-04 15:31   ` Maxime Ripard
2018-12-04 14:22 ` [PATCH v3 12/21] drm/sun4i: Add buffer stride and offset configuration for tiling mode Paul Kocialkowski
2018-12-04 15:34   ` Maxime Ripard
2018-12-04 14:22 ` [PATCH v3 13/21] drm/sun4i: frontend: Add and use helper for checking tiling support Paul Kocialkowski
2018-12-04 15:34   ` Maxime Ripard
2018-12-04 14:22 ` [PATCH v3 14/21] drm/sun4i: layer: Add tiled modifier support and helper Paul Kocialkowski
2018-12-04 15:34   ` Maxime Ripard
2018-12-04 14:22 ` [PATCH v3 15/21] drm/sun4i: drv: Allow framebuffer modifiers in mode config Paul Kocialkowski
2018-12-04 15:34   ` Maxime Ripard
2018-12-04 14:22 ` [PATCH v3 16/21] drm/sun4i: Move access control before setting the register as documented Paul Kocialkowski
2018-12-04 14:22 ` [PATCH v3 17/21] drm/sun4i: frontend: Add a quirk structure Paul Kocialkowski
2018-12-04 14:22 ` [PATCH v3 18/21] drm/sun4i: Set the coef_rdy bit right after the coef have been set Paul Kocialkowski
2018-12-04 14:22 ` [PATCH v3 19/21] drm/sun4i: Make COEF_RDY conditional Paul Kocialkowski
2018-12-04 14:22 ` [PATCH v3 20/21] drm/sun4i: frontend: Move the FIR filter phases to our quirks Paul Kocialkowski
2018-12-04 14:22 ` [PATCH v3 21/21] drm/sun4i: frontend: Add A20-specific device-tree compatible and quirks Paul Kocialkowski
2018-12-04 15:35   ` Maxime Ripard

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