Re: [PATCH 2/2] perf/x86/intel: Support PEBS output to PT

[Peter Zijlstra <peterz@infradead.org>]

On Thu, May 02, 2019 at 01:50:22PM +0300, Alexander Shishkin wrote:
> If PEBS declares ability to output its data to Intel PT stream, use the
> aux_source attribute bit to enable PEBS data output to PT. This requires
> a PT event to be present and scheduled in the same context. Unlike the
> DS area, the kernel does not extract PEBS records from the PT stream to
> generate corresponding records in the perf stream, because that would
> require real time in-kernel PT decoding, which is not feasible. The PMI,
> however, can still be used.
> 
> The output setting is per-CPU, so all PEBS events must be either writing
> to PT or to the DS area, so in order to not mess up the event scheduling,
> we fall back to the latter in case both types of events are scheduled in.
> 
> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
> ---
>  arch/x86/events/intel/core.c     | 13 +++++++
>  arch/x86/events/intel/ds.c       | 59 +++++++++++++++++++++++++++++++-
>  arch/x86/events/perf_event.h     |  9 +++++
>  arch/x86/include/asm/msr-index.h |  3 ++
>  4 files changed, 83 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
> index 4b4dac089635..949a589fd9b1 100644
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -3291,6 +3291,19 @@ static int intel_pmu_hw_config(struct perf_event *event)
>  		}
>  	}
>  
> +	if (event->attr.aux_source) {
> +		if (!event->attr.precise_ip)
> +			return -EINVAL;
> +
> +		if (!x86_pmu.intel_cap.pebs_output_pt_available)
> +			return -EOPNOTSUPP;
> +
> +		event->hw.flags |= PERF_X86_EVENT_PEBS_VIA_PT;
> +
> +		/* Signal to the core that we handled it */
> +		event->attr.aux_source = 0;

That's a bit yuck, ideally we'd not modify attrs.

Can't we change that test in perf_event_alloc() to something like:

	if (event->attr.aux_source &&
	    !(pmu->capabilities & PERF_PMU_CAP_AUX_SOURCE))
		// error

?


> +	}