From: Peter Zijlstra <peterz@infradead.org>
To: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>,
Ingo Molnar <mingo@redhat.com>,
linux-kernel@vger.kernel.org, jolsa@redhat.com,
adrian.hunter@intel.com
Subject: Re: [PATCH 2/2] perf/x86/intel: Support PEBS output to PT
Date: Wed, 8 May 2019 11:34:21 +0200 [thread overview]
Message-ID: <20190508093421.GD2606@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20190502105022.15534-3-alexander.shishkin@linux.intel.com>
On Thu, May 02, 2019 at 01:50:22PM +0300, Alexander Shishkin wrote:
> The output setting is per-CPU, so all PEBS events must be either writing
> to PT or to the DS area, so in order to not mess up the event scheduling,
> we fall back to the latter in case both types of events are scheduled in.
> +static void intel_pmu_pebs_via_pt_disable(struct perf_event *event)
> +{
> + struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
> +
> + if (!(event->hw.flags & PERF_X86_EVENT_PEBS_VIA_PT))
> + return;
> +
> + if (!(cpuc->pebs_enabled & ~PEBS_VIA_PT_MASK))
> + cpuc->pebs_enabled &= ~PEBS_VIA_PT_MASK;
> +}
> +
> +static void intel_pmu_pebs_via_pt_enable(struct perf_event *event)
> +{
> + struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
> + struct hw_perf_event *hwc = &event->hw;
> + struct debug_store *ds = cpuc->ds;
> +
> + if (!(event->hw.flags & PERF_X86_EVENT_PEBS_VIA_PT))
> + return;
> +
> + /*
> + * In case there's a mix of PEBS->PT and PEBS->DS, fall back
> + * to DS.
> + */
> + if (cpuc->n_pebs != cpuc->n_pebs_via_pt) {
> + /* PEBS-to-DS events present, fall back to DS */
> + intel_pmu_pebs_via_pt_disable(event);
> + return;
> + }
> +
> + if (!(event->hw.flags & PERF_X86_EVENT_LARGE_PEBS))
> + cpuc->pebs_enabled |= PEBS_PMI_AFTER_EACH_RECORD;
> +
> + cpuc->pebs_enabled |= PEBS_OUTPUT_PT;
> +
> + wrmsrl(MSR_RELOAD_PMC0 + hwc->idx, ds->pebs_event_reset[hwc->idx]);
> +}
> +
> void intel_pmu_pebs_enable(struct perf_event *event)
> {
> struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
> @@ -1100,6 +1146,8 @@ void intel_pmu_pebs_enable(struct perf_event *event)
> } else {
> ds->pebs_event_reset[hwc->idx] = 0;
> }
> +
> + intel_pmu_pebs_via_pt_enable(event);
> }
I think that doesn't even do what it says on the tin. Suppose you first
schedule that PEBS-via-PT event and then the normal one, nothing then
cancels the PT link.
Like I wrote in that prevoius email; I really don't like this. I think
silently falling back to another output method is wrong.
Ideally we create schedulig conflicts and cause the PT and DS events to
round robin.
next prev parent reply other threads:[~2019-05-08 9:34 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-02 10:50 [PATCH 0/2] perf, intel: Add support for PEBS output to Intel PT Alexander Shishkin
2019-05-02 10:50 ` [PATCH 1/2] perf: Allow normal events to be sources of AUX data Alexander Shishkin
2019-05-02 10:50 ` [PATCH 2/2] perf/x86/intel: Support PEBS output to PT Alexander Shishkin
2019-05-08 9:12 ` Peter Zijlstra
2019-05-08 9:18 ` Peter Zijlstra
2019-05-08 9:34 ` Peter Zijlstra [this message]
2019-05-03 8:57 ` [PATCH 0/2] perf, intel: Add support for PEBS output to Intel PT Alexander Shishkin
2019-05-08 10:39 ` Peter Zijlstra
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