* [PATCH 1/9] arm64: dts: ti: k3-am65-main: Correct main NAVSS representation
2019-11-12 14:32 [PATCH 0/9] arm64: dts: ti: UDMAP and McASP support Peter Ujfalusi
@ 2019-11-12 14:32 ` Peter Ujfalusi
2019-11-12 14:32 ` [PATCH 2/9] arm64: dts: ti: k3-am65-main: Move secure proxy under cbass_main_navss Peter Ujfalusi
` (7 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Peter Ujfalusi @ 2019-11-12 14:32 UTC (permalink / raw)
To: t-kristo, nm
Cc: robh+dt, mark.rutland, linux-arm-kernel, devicetree, linux-kernel
NAVSS is a subsystem containing different IPs, it is not really a bus.
Change the compatible from "simple-bus" to "simple-mfd" to reflect that.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index efb24579922c..e40f7acbec42 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -385,8 +385,8 @@ intr_main_gpio: interrupt-controller0 {
ti,sci-rm-range-girq = <0x1>;
};
- cbass_main_navss: interconnect0 {
- compatible = "simple-bus";
+ cbass_main_navss: navss@30800000 {
+ compatible = "simple-mfd";
#address-cells = <2>;
#size-cells = <2>;
ranges;
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 2/9] arm64: dts: ti: k3-am65-main: Move secure proxy under cbass_main_navss
2019-11-12 14:32 [PATCH 0/9] arm64: dts: ti: UDMAP and McASP support Peter Ujfalusi
2019-11-12 14:32 ` [PATCH 1/9] arm64: dts: ti: k3-am65-main: Correct main NAVSS representation Peter Ujfalusi
@ 2019-11-12 14:32 ` Peter Ujfalusi
2019-11-12 14:32 ` [PATCH 3/9] arm64: dts: ti: k3-am65: DMA support Peter Ujfalusi
` (6 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Peter Ujfalusi @ 2019-11-12 14:32 UTC (permalink / raw)
To: t-kristo, nm
Cc: robh+dt, mark.rutland, linux-arm-kernel, devicetree, linux-kernel
Secure proxy (NAVSS0_SEC_PROXY0) is part of the Navigator Subsystem.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index e40f7acbec42..a125d66dd552 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -51,17 +51,6 @@ gic_its: gic-its@1820000 {
};
};
- secure_proxy_main: mailbox@32c00000 {
- compatible = "ti,am654-secure-proxy";
- #mbox-cells = <1>;
- reg-names = "target_data", "rt", "scfg";
- reg = <0x00 0x32c00000 0x00 0x100000>,
- <0x00 0x32400000 0x00 0x100000>,
- <0x00 0x32800000 0x00 0x100000>;
- interrupt-names = "rx_011";
- interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
- };
-
serdes0: serdes@900000 {
compatible = "ti,phy-am654-serdes";
reg = <0x0 0x900000 0x0 0x2000>;
@@ -414,6 +403,17 @@ inta_main_udmass: interrupt-controller@33d00000 {
ti,sci-rm-range-global-event = <0x1>;
};
+ secure_proxy_main: mailbox@32c00000 {
+ compatible = "ti,am654-secure-proxy";
+ #mbox-cells = <1>;
+ reg-names = "target_data", "rt", "scfg";
+ reg = <0x00 0x32c00000 0x00 0x100000>,
+ <0x00 0x32400000 0x00 0x100000>,
+ <0x00 0x32800000 0x00 0x100000>;
+ interrupt-names = "rx_011";
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
hwspinlock: spinlock@30e00000 {
compatible = "ti,am654-hwspinlock";
reg = <0x00 0x30e00000 0x00 0x1000>;
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 3/9] arm64: dts: ti: k3-am65: DMA support
2019-11-12 14:32 [PATCH 0/9] arm64: dts: ti: UDMAP and McASP support Peter Ujfalusi
2019-11-12 14:32 ` [PATCH 1/9] arm64: dts: ti: k3-am65-main: Correct main NAVSS representation Peter Ujfalusi
2019-11-12 14:32 ` [PATCH 2/9] arm64: dts: ti: k3-am65-main: Move secure proxy under cbass_main_navss Peter Ujfalusi
@ 2019-11-12 14:32 ` Peter Ujfalusi
2019-11-12 14:32 ` [PATCH 4/9] arm64: dts: ti: k3-am654-main: Add McASP nodes Peter Ujfalusi
` (5 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Peter Ujfalusi @ 2019-11-12 14:32 UTC (permalink / raw)
To: t-kristo, nm
Cc: robh+dt, mark.rutland, linux-arm-kernel, devicetree, linux-kernel
Add the ringacc and udmap nodes for main and mcu NAVSS.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 39 ++++++++++++++++++++
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 46 ++++++++++++++++++++++++
2 files changed, 85 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index a125d66dd552..be841fc44b76 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -379,6 +379,10 @@ cbass_main_navss: navss@30800000 {
#address-cells = <2>;
#size-cells = <2>;
ranges;
+ dma-coherent;
+ dma-ranges;
+
+ ti,sci-dev-id = <118>;
intr_main_navss: interrupt-controller1 {
compatible = "ti,sci-intr";
@@ -527,6 +531,41 @@ mailbox0_cluster11: mailbox@31f8b000 {
ti,mbox-num-fifos = <16>;
interrupt-parent = <&intr_main_navss>;
};
+
+ ringacc: ringacc@3c000000 {
+ compatible = "ti,am654-navss-ringacc";
+ reg = <0x0 0x3c000000 0x0 0x400000>,
+ <0x0 0x38000000 0x0 0x400000>,
+ <0x0 0x31120000 0x0 0x100>,
+ <0x0 0x33000000 0x0 0x40000>;
+ reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
+ ti,num-rings = <818>;
+ ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
+ ti,dma-ring-reset-quirk;
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <187>;
+ msi-parent = <&inta_main_udmass>;
+ };
+
+ main_udmap: dma-controller@31150000 {
+ compatible = "ti,am654-navss-main-udmap";
+ reg = <0x0 0x31150000 0x0 0x100>,
+ <0x0 0x34000000 0x0 0x100000>,
+ <0x0 0x35000000 0x0 0x100000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt";
+ msi-parent = <&inta_main_udmass>;
+ #dma-cells = <1>;
+
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <188>;
+ ti,ringacc = <&ringacc>;
+
+ ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
+ <0x2>; /* TX_CHAN */
+ ti,sci-rm-range-rchan = <0x4>, /* RX_HCHAN */
+ <0x5>; /* RX_CHAN */
+ ti,sci-rm-range-rflow = <0x6>; /* GP RFLOW */
+ };
};
main_gpio0: main_gpio0@600000 {
diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
index 7bdf5342f58f..27fc73f94cf9 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
@@ -95,4 +95,50 @@ adc {
compatible = "ti,am654-adc", "ti,am3359-adc";
};
};
+
+ cbass_mcu_navss: navss@28380000 {
+ compatible = "simple-mfd";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ dma-coherent;
+ dma-ranges;
+
+ ti,sci-dev-id = <119>;
+
+ mcu_ringacc: ringacc@2b800000 {
+ compatible = "ti,am654-navss-ringacc";
+ reg = <0x0 0x2b800000 0x0 0x400000>,
+ <0x0 0x2b000000 0x0 0x400000>,
+ <0x0 0x28590000 0x0 0x100>,
+ <0x0 0x2a500000 0x0 0x40000>;
+ reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
+ ti,num-rings = <286>;
+ ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
+ ti,dma-ring-reset-quirk;
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <195>;
+ msi-parent = <&inta_main_udmass>;
+ };
+
+ mcu_udmap: dma-controller@285c0000 {
+ compatible = "ti,am654-navss-mcu-udmap";
+ reg = <0x0 0x285c0000 0x0 0x100>,
+ <0x0 0x2a800000 0x0 0x40000>,
+ <0x0 0x2aa00000 0x0 0x40000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt";
+ msi-parent = <&inta_main_udmass>;
+ #dma-cells = <1>;
+
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <194>;
+ ti,ringacc = <&mcu_ringacc>;
+
+ ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
+ <0x2>; /* TX_CHAN */
+ ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */
+ <0x4>; /* RX_CHAN */
+ ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */
+ };
+ };
};
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 4/9] arm64: dts: ti: k3-am654-main: Add McASP nodes
2019-11-12 14:32 [PATCH 0/9] arm64: dts: ti: UDMAP and McASP support Peter Ujfalusi
` (2 preceding siblings ...)
2019-11-12 14:32 ` [PATCH 3/9] arm64: dts: ti: k3-am65: DMA support Peter Ujfalusi
@ 2019-11-12 14:32 ` Peter Ujfalusi
2019-11-12 14:32 ` [PATCH 5/9] arm64: dts: ti: k3-j721e: Correct the address for MAIN NAVSS Peter Ujfalusi
` (4 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Peter Ujfalusi @ 2019-11-12 14:32 UTC (permalink / raw)
To: t-kristo, nm
Cc: robh+dt, mark.rutland, linux-arm-kernel, devicetree, linux-kernel
Add the nodes for McASP 0-2 and keep them disabled because several
required properties are not present as they are board specific.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 57 ++++++++++++++++++++++++
1 file changed, 57 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index be841fc44b76..6dd28202a221 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -663,4 +663,61 @@ pcie1_ep: pcie-ep@5600000 {
dma-coherent;
interrupts = <GIC_SPI 355 IRQ_TYPE_EDGE_RISING>;
};
+
+ mcasp0: mcasp@02B00000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02B00000 0x0 0x2000>,
+ <0x0 0x02B08000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc400>, <&main_udmap 0x4400>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 104 0>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp1: mcasp@02B10000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02B10000 0x0 0x2000>,
+ <0x0 0x02B18000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc401>, <&main_udmap 0x4401>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 105 0>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp2: mcasp@02B20000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02B20000 0x0 0x2000>,
+ <0x0 0x02B28000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc402>, <&main_udmap 0x4402>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 106 0>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
};
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 5/9] arm64: dts: ti: k3-j721e: Correct the address for MAIN NAVSS
2019-11-12 14:32 [PATCH 0/9] arm64: dts: ti: UDMAP and McASP support Peter Ujfalusi
` (3 preceding siblings ...)
2019-11-12 14:32 ` [PATCH 4/9] arm64: dts: ti: k3-am654-main: Add McASP nodes Peter Ujfalusi
@ 2019-11-12 14:32 ` Peter Ujfalusi
2019-11-12 14:32 ` [PATCH 6/9] arm64: dts: ti: k3-j721e-main: Correct main NAVSS representation Peter Ujfalusi
` (3 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Peter Ujfalusi @ 2019-11-12 14:32 UTC (permalink / raw)
To: t-kristo, nm
Cc: robh+dt, mark.rutland, linux-arm-kernel, devicetree, linux-kernel
On am654 the MAIN NAVSS base address was 0x30800000, but in j721e it is
at 0x30000000
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721e.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e.dtsi b/arch/arm64/boot/dts/ti/k3-j721e.dtsi
index ee5470edb435..027bd1febafa 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e.dtsi
@@ -130,7 +130,7 @@ cbass_main: interconnect@100000 {
<0x00 0x06000000 0x00 0x06000000 0x00 0x00400000>, /* USBSS0 */
<0x00 0x06400000 0x00 0x06400000 0x00 0x00400000>, /* USBSS1 */
<0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */
- <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */
+ <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>, /* MAIN NAVSS */
<0x00 0x0d000000 0x00 0x0d000000 0x00 0x01000000>, /* PCIe Core*/
<0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */
<0x00 0x64800000 0x00 0x64800000 0x00 0x00800000>, /* C71 */
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 6/9] arm64: dts: ti: k3-j721e-main: Correct main NAVSS representation
2019-11-12 14:32 [PATCH 0/9] arm64: dts: ti: UDMAP and McASP support Peter Ujfalusi
` (4 preceding siblings ...)
2019-11-12 14:32 ` [PATCH 5/9] arm64: dts: ti: k3-j721e: Correct the address for MAIN NAVSS Peter Ujfalusi
@ 2019-11-12 14:32 ` Peter Ujfalusi
2019-11-12 14:32 ` [PATCH 7/9] arm64: dts: ti: k3-j721e-main: Move secure proxy and smmu under main_navss Peter Ujfalusi
` (2 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Peter Ujfalusi @ 2019-11-12 14:32 UTC (permalink / raw)
To: t-kristo, nm
Cc: robh+dt, mark.rutland, linux-arm-kernel, devicetree, linux-kernel
NAVSS is a subsystem containing different IPs, it is not really a bus.
Change the compatible from "simple-bus" to "simple-mfd" to reflect that.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 1e4c2b78d66d..7f320eec0459 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -61,8 +61,8 @@ main_gpio_intr: interrupt-controller0 {
ti,sci-rm-range-girq = <0x1>;
};
- cbass_main_navss: interconnect0 {
- compatible = "simple-bus";
+ cbass_main_navss: navss@30000000 {
+ compatible = "simple-mfd";
#address-cells = <2>;
#size-cells = <2>;
ranges;
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 7/9] arm64: dts: ti: k3-j721e-main: Move secure proxy and smmu under main_navss
2019-11-12 14:32 [PATCH 0/9] arm64: dts: ti: UDMAP and McASP support Peter Ujfalusi
` (5 preceding siblings ...)
2019-11-12 14:32 ` [PATCH 6/9] arm64: dts: ti: k3-j721e-main: Correct main NAVSS representation Peter Ujfalusi
@ 2019-11-12 14:32 ` Peter Ujfalusi
2019-11-12 14:33 ` [PATCH 8/9] arm64: dts: ti: k3-j721e: DMA support Peter Ujfalusi
2019-11-12 14:33 ` [PATCH 9/9] arm64: dts: ti: k3-j721e-main: Add McASP nodes Peter Ujfalusi
8 siblings, 0 replies; 10+ messages in thread
From: Peter Ujfalusi @ 2019-11-12 14:32 UTC (permalink / raw)
To: t-kristo, nm
Cc: robh+dt, mark.rutland, linux-arm-kernel, devicetree, linux-kernel
Secure proxy (NAVSS0_SEC_PROXY0) and smmu (NAVSS0_TCU) is part of the
Navigator Subsystem.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 42 +++++++++++------------
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 7f320eec0459..4bf8c27ecc64 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -40,16 +40,6 @@ gic_its: gic-its@1820000 {
};
};
- smmu0: smmu@36600000 {
- compatible = "arm,smmu-v3";
- reg = <0x0 0x36600000 0x0 0x100000>;
- interrupt-parent = <&gic500>;
- interrupts = <GIC_SPI 772 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "eventq", "gerror";
- #iommu-cells = <1>;
- };
-
main_gpio_intr: interrupt-controller0 {
compatible = "ti,sci-intr";
ti,intr-trigger-type = <1>;
@@ -90,6 +80,27 @@ main_udmass_inta: interrupt-controller@33d00000 {
ti,sci-rm-range-global-event = <0xd>;
};
+ secure_proxy_main: mailbox@32c00000 {
+ compatible = "ti,am654-secure-proxy";
+ #mbox-cells = <1>;
+ reg-names = "target_data", "rt", "scfg";
+ reg = <0x00 0x32c00000 0x00 0x100000>,
+ <0x00 0x32400000 0x00 0x100000>,
+ <0x00 0x32800000 0x00 0x100000>;
+ interrupt-names = "rx_011";
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ smmu0: smmu@36600000 {
+ compatible = "arm,smmu-v3";
+ reg = <0x0 0x36600000 0x0 0x100000>;
+ interrupt-parent = <&gic500>;
+ interrupts = <GIC_SPI 772 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "eventq", "gerror";
+ #iommu-cells = <1>;
+ };
+
hwspinlock: spinlock@30e00000 {
compatible = "ti,am654-hwspinlock";
reg = <0x00 0x30e00000 0x00 0x1000>;
@@ -205,17 +216,6 @@ mailbox0_cluster11: mailbox@31f8b000 {
};
};
- secure_proxy_main: mailbox@32c00000 {
- compatible = "ti,am654-secure-proxy";
- #mbox-cells = <1>;
- reg-names = "target_data", "rt", "scfg";
- reg = <0x00 0x32c00000 0x00 0x100000>,
- <0x00 0x32400000 0x00 0x100000>,
- <0x00 0x32800000 0x00 0x100000>;
- interrupt-names = "rx_011";
- interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
- };
-
main_pmx0: pinmux@11c000 {
compatible = "pinctrl-single";
/* Proxy 0 addressing */
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 8/9] arm64: dts: ti: k3-j721e: DMA support
2019-11-12 14:32 [PATCH 0/9] arm64: dts: ti: UDMAP and McASP support Peter Ujfalusi
` (6 preceding siblings ...)
2019-11-12 14:32 ` [PATCH 7/9] arm64: dts: ti: k3-j721e-main: Move secure proxy and smmu under main_navss Peter Ujfalusi
@ 2019-11-12 14:33 ` Peter Ujfalusi
2019-11-12 14:33 ` [PATCH 9/9] arm64: dts: ti: k3-j721e-main: Add McASP nodes Peter Ujfalusi
8 siblings, 0 replies; 10+ messages in thread
From: Peter Ujfalusi @ 2019-11-12 14:33 UTC (permalink / raw)
To: t-kristo, nm
Cc: robh+dt, mark.rutland, linux-arm-kernel, devicetree, linux-kernel
Add the ringacc and udmap nodes for main and mcu NAVSS.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 40 +++++++++++++++++
.../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 45 +++++++++++++++++++
2 files changed, 85 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 4bf8c27ecc64..66583625dc95 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -56,6 +56,10 @@ cbass_main_navss: navss@30000000 {
#address-cells = <2>;
#size-cells = <2>;
ranges;
+ dma-coherent;
+ dma-ranges;
+
+ ti,sci-dev-id = <199>;
main_navss_intr: interrupt-controller1 {
compatible = "ti,sci-intr";
@@ -214,6 +218,42 @@ mailbox0_cluster11: mailbox@31f8b000 {
ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>;
};
+
+ main_ringacc: ringacc@3c000000 {
+ compatible = "ti,am654-navss-ringacc";
+ reg = <0x0 0x3c000000 0x0 0x400000>,
+ <0x0 0x38000000 0x0 0x400000>,
+ <0x0 0x31120000 0x0 0x100>,
+ <0x0 0x33000000 0x0 0x40000>;
+ reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
+ ti,num-rings = <1024>;
+ ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <211>;
+ msi-parent = <&main_udmass_inta>;
+ };
+
+ main_udmap: dma-controller@31150000 {
+ compatible = "ti,j721e-navss-main-udmap";
+ reg = <0x0 0x31150000 0x0 0x100>,
+ <0x0 0x34000000 0x0 0x100000>,
+ <0x0 0x35000000 0x0 0x100000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt";
+ msi-parent = <&main_udmass_inta>;
+ #dma-cells = <1>;
+
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <212>;
+ ti,ringacc = <&main_ringacc>;
+
+ ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
+ <0x0f>, /* TX_HCHAN */
+ <0x10>; /* TX_UHCHAN */
+ ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
+ <0x0b>, /* RX_HCHAN */
+ <0x0c>; /* RX_UHCHAN */
+ ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
+ };
};
main_pmx0: pinmux@11c000 {
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
index 555dc7b7aedc..13c0e6953d33 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
@@ -121,4 +121,49 @@ wkup_gpio1: gpio@42100000 {
clocks = <&k3_clks 114 0>;
clock-names = "gpio";
};
+
+ cbass_mcu_navss: navss@28380000 {
+ compatible = "simple-mfd";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ dma-coherent;
+ dma-ranges;
+
+ ti,sci-dev-id = <232>;
+
+ mcu_ringacc: ringacc@2b800000 {
+ compatible = "ti,am654-navss-ringacc";
+ reg = <0x0 0x2b800000 0x0 0x400000>,
+ <0x0 0x2b000000 0x0 0x400000>,
+ <0x0 0x28590000 0x0 0x100>,
+ <0x0 0x2a500000 0x0 0x40000>;
+ reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
+ ti,num-rings = <286>;
+ ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <235>;
+ msi-parent = <&main_udmass_inta>;
+ };
+
+ mcu_udmap: udmap@285c0000 {
+ compatible = "ti,j721e-navss-mcu-udmap";
+ reg = <0x0 0x285c0000 0x0 0x100>,
+ <0x0 0x2a800000 0x0 0x40000>,
+ <0x0 0x2aa00000 0x0 0x40000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt";
+ msi-parent = <&main_udmass_inta>;
+ #dma-cells = <1>;
+
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <236>;
+ ti,ringacc = <&mcu_ringacc>;
+
+ ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
+ <0x0f>; /* TX_HCHAN */
+ ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
+ <0x0b>; /* RX_HCHAN */
+ ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
+ };
+ };
};
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 9/9] arm64: dts: ti: k3-j721e-main: Add McASP nodes
2019-11-12 14:32 [PATCH 0/9] arm64: dts: ti: UDMAP and McASP support Peter Ujfalusi
` (7 preceding siblings ...)
2019-11-12 14:33 ` [PATCH 8/9] arm64: dts: ti: k3-j721e: DMA support Peter Ujfalusi
@ 2019-11-12 14:33 ` Peter Ujfalusi
8 siblings, 0 replies; 10+ messages in thread
From: Peter Ujfalusi @ 2019-11-12 14:33 UTC (permalink / raw)
To: t-kristo, nm
Cc: robh+dt, mark.rutland, linux-arm-kernel, devicetree, linux-kernel
Add the nodes for McASP 0-11 and keep them disabled because several
required properties are not present as they are board specific.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 228 ++++++++++++++++++++++
1 file changed, 228 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 66583625dc95..276ac946d8d8 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -636,4 +636,232 @@ usb1: usb@6400000 {
dr_mode = "otg";
};
};
+
+ mcasp0: mcasp@02b00000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02b00000 0x0 0x2000>,
+ <0x0 0x02b08000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 545 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc400>, <&main_udmap 0x4400>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 174 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 174 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp1: mcasp@02b10000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02b10000 0x0 0x2000>,
+ <0x0 0x02b18000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 547 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc401>, <&main_udmap 0x4401>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 175 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 175 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp2: mcasp@02b20000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02b20000 0x0 0x2000>,
+ <0x0 0x02b28000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 548 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 549 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc402>, <&main_udmap 0x4402>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 176 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 176 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp3: mcasp@02b30000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02b30000 0x0 0x2000>,
+ <0x0 0x02b38000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 550 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc500>, <&main_udmap 0x4500>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 177 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 177 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp4: mcasp@02b40000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02b40000 0x0 0x2000>,
+ <0x0 0x02b48000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 552 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 553 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc501>, <&main_udmap 0x4501>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 178 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp5: mcasp@02b50000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02b50000 0x0 0x2000>,
+ <0x0 0x02b58000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 554 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 555 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc502>, <&main_udmap 0x4502>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 179 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp6: mcasp@02b60000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02b60000 0x0 0x2000>,
+ <0x0 0x02b68000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 556 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 557 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc503>, <&main_udmap 0x4503>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 180 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 180 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp7: mcasp@02b70000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02b70000 0x0 0x2000>,
+ <0x0 0x02b78000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 558 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 559 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc504>, <&main_udmap 0x4504>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 181 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 181 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp8: mcasp@02b80000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02b80000 0x0 0x2000>,
+ <0x0 0x02b88000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 560 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 561 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc505>, <&main_udmap 0x4505>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 182 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp9: mcasp@02b90000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02b90000 0x0 0x2000>,
+ <0x0 0x02b98000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 562 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 563 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc506>, <&main_udmap 0x4506>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 183 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 183 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp10: mcasp@02ba0000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02ba0000 0x0 0x2000>,
+ <0x0 0x02ba8000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 564 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 565 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc507>, <&main_udmap 0x4507>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 184 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp11: mcasp@02bb0000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02bb0000 0x0 0x2000>,
+ <0x0 0x02bb8000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 566 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 567 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc508>, <&main_udmap 0x4508>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 185 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
};
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply [flat|nested] 10+ messages in thread