* [PATCH 1/5] dt-bindings: Add new F1C100s compatible strings for USB
2020-02-27 18:14 [PATCH 0/5] Support the Allwinner F1C100s USB stack George Hilliard
@ 2020-02-27 18:14 ` George Hilliard
2020-02-27 18:14 ` [PATCH 2/5] phy: sun4i-usb: add support for the USB PHY on suniv SoC George Hilliard
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: George Hilliard @ 2020-02-27 18:14 UTC (permalink / raw)
To: Chen-Yu Tsai, Rob Herring, Mark Rutland
Cc: George Hilliard, Icenowy Zheng, linux-kernel
This chip contains variants of the already-supported peripherals present
on other Allwinner parts. Add a new compatible line for them.
Signed-off-by: George Hilliard <thirtythreeforty@gmail.com>
---
.../devicetree/bindings/phy/allwinner,sun4i-a10-usb-phy.yaml | 1 +
.../devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml | 1 +
2 files changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun4i-a10-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun4i-a10-usb-phy.yaml
index 020ef9e4c411..1762a302c594 100644
--- a/Documentation/devicetree/bindings/phy/allwinner,sun4i-a10-usb-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/allwinner,sun4i-a10-usb-phy.yaml
@@ -18,6 +18,7 @@ properties:
enum:
- allwinner,sun4i-a10-usb-phy
- allwinner,sun7i-a20-usb-phy
+ - allwinner,suniv-f1c100s-usb-phy
reg:
items:
diff --git a/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml b/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml
index d9207bf9d894..d2eea0003b99 100644
--- a/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml
+++ b/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml
@@ -17,6 +17,7 @@ properties:
- const: allwinner,sun6i-a31-musb
- const: allwinner,sun8i-a33-musb
- const: allwinner,sun8i-h3-musb
+ - const: allwinner,suniv-f1c100s-musb
- items:
- enum:
- allwinner,sun8i-a83t-musb
--
2.25.0
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 2/5] phy: sun4i-usb: add support for the USB PHY on suniv SoC
2020-02-27 18:14 [PATCH 0/5] Support the Allwinner F1C100s USB stack George Hilliard
2020-02-27 18:14 ` [PATCH 1/5] dt-bindings: Add new F1C100s compatible strings for USB George Hilliard
@ 2020-02-27 18:14 ` George Hilliard
2020-02-27 18:14 ` [PATCH 3/5] musb: sunxi: add support for the suniv MUSB controller George Hilliard
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: George Hilliard @ 2020-02-27 18:14 UTC (permalink / raw)
To: Chen-Yu Tsai, Rob Herring, Mark Rutland
Cc: George Hilliard, Icenowy Zheng, linux-kernel
The suniv SoC has one USB OTG port connected to a MUSB controller.
Add support for its USB PHY.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: George Hilliard <thirtythreeforty@gmail.com>
---
drivers/phy/allwinner/phy-sun4i-usb.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c
index 856927382248..5fb0c42fe8fd 100644
--- a/drivers/phy/allwinner/phy-sun4i-usb.c
+++ b/drivers/phy/allwinner/phy-sun4i-usb.c
@@ -98,6 +98,7 @@
#define POLL_TIME msecs_to_jiffies(250)
enum sun4i_usb_phy_type {
+ suniv_f1c100s_phy,
sun4i_a10_phy,
sun6i_a31_phy,
sun8i_a33_phy,
@@ -859,6 +860,14 @@ static int sun4i_usb_phy_probe(struct platform_device *pdev)
return 0;
}
+static const struct sun4i_usb_phy_cfg suniv_f1c100s_cfg = {
+ .num_phys = 1,
+ .type = suniv_f1c100s_phy,
+ .disc_thresh = 3,
+ .phyctl_offset = REG_PHYCTL_A10,
+ .dedicated_clocks = true,
+};
+
static const struct sun4i_usb_phy_cfg sun4i_a10_cfg = {
.num_phys = 3,
.type = sun4i_a10_phy,
@@ -973,6 +982,8 @@ static const struct sun4i_usb_phy_cfg sun50i_h6_cfg = {
};
static const struct of_device_id sun4i_usb_phy_of_match[] = {
+ { .compatible = "allwinner,suniv-f1c100s-usb-phy",
+ .data = &suniv_f1c100s_cfg },
{ .compatible = "allwinner,sun4i-a10-usb-phy", .data = &sun4i_a10_cfg },
{ .compatible = "allwinner,sun5i-a13-usb-phy", .data = &sun5i_a13_cfg },
{ .compatible = "allwinner,sun6i-a31-usb-phy", .data = &sun6i_a31_cfg },
--
2.25.0
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 3/5] musb: sunxi: add support for the suniv MUSB controller
2020-02-27 18:14 [PATCH 0/5] Support the Allwinner F1C100s USB stack George Hilliard
2020-02-27 18:14 ` [PATCH 1/5] dt-bindings: Add new F1C100s compatible strings for USB George Hilliard
2020-02-27 18:14 ` [PATCH 2/5] phy: sun4i-usb: add support for the USB PHY on suniv SoC George Hilliard
@ 2020-02-27 18:14 ` George Hilliard
2020-02-27 18:14 ` [PATCH 4/5] ARM: suniv: add USB-related device nodes George Hilliard
2020-02-27 18:14 ` [PATCH 5/5] ARM: suniv: f1c100s: enable USB on Lichee Pi Nano George Hilliard
4 siblings, 0 replies; 6+ messages in thread
From: George Hilliard @ 2020-02-27 18:14 UTC (permalink / raw)
To: Chen-Yu Tsai, Rob Herring, Mark Rutland
Cc: George Hilliard, Icenowy Zheng, linux-kernel
The suniv SoC has a MUSB controller like the one in A33, but with a SRAM
region to be claimed.
Add support for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: George Hilliard <thirtythreeforty@gmail.com>
---
drivers/usb/musb/sunxi.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/musb/sunxi.c b/drivers/usb/musb/sunxi.c
index f3f76f2ac63f..76806b781844 100644
--- a/drivers/usb/musb/sunxi.c
+++ b/drivers/usb/musb/sunxi.c
@@ -714,14 +714,17 @@ static int sunxi_musb_probe(struct platform_device *pdev)
INIT_WORK(&glue->work, sunxi_musb_work);
glue->host_nb.notifier_call = sunxi_musb_host_notifier;
- if (of_device_is_compatible(np, "allwinner,sun4i-a10-musb"))
+ if (of_device_is_compatible(np, "allwinner,sun4i-a10-musb") ||
+ of_device_is_compatible(np, "allwinner,suniv-f1c100s-musb")) {
set_bit(SUNXI_MUSB_FL_HAS_SRAM, &glue->flags);
+ }
if (of_device_is_compatible(np, "allwinner,sun6i-a31-musb"))
set_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags);
if (of_device_is_compatible(np, "allwinner,sun8i-a33-musb") ||
- of_device_is_compatible(np, "allwinner,sun8i-h3-musb")) {
+ of_device_is_compatible(np, "allwinner,sun8i-h3-musb") ||
+ of_device_is_compatible(np, "allwinner,suniv-f1c100s-musb")) {
set_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags);
set_bit(SUNXI_MUSB_FL_NO_CONFIGDATA, &glue->flags);
}
@@ -814,6 +817,7 @@ static int sunxi_musb_remove(struct platform_device *pdev)
}
static const struct of_device_id sunxi_musb_match[] = {
+ { .compatible = "allwinner,suniv-f1c100s-musb", },
{ .compatible = "allwinner,sun4i-a10-musb", },
{ .compatible = "allwinner,sun6i-a31-musb", },
{ .compatible = "allwinner,sun8i-a33-musb", },
--
2.25.0
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 4/5] ARM: suniv: add USB-related device nodes
2020-02-27 18:14 [PATCH 0/5] Support the Allwinner F1C100s USB stack George Hilliard
` (2 preceding siblings ...)
2020-02-27 18:14 ` [PATCH 3/5] musb: sunxi: add support for the suniv MUSB controller George Hilliard
@ 2020-02-27 18:14 ` George Hilliard
2020-02-27 18:14 ` [PATCH 5/5] ARM: suniv: f1c100s: enable USB on Lichee Pi Nano George Hilliard
4 siblings, 0 replies; 6+ messages in thread
From: George Hilliard @ 2020-02-27 18:14 UTC (permalink / raw)
To: Chen-Yu Tsai, Rob Herring, Mark Rutland
Cc: Icenowy Zheng, linux-kernel, George Hilliard
From: Icenowy Zheng <icenowy@aosc.io>
The suniv SoC has a USB OTG controller and a USB PHY like other
Allwinner SoCs.
Add their device tree node.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: George Hilliard <thirtythreeforty@gmail.com>
---
arch/arm/boot/dts/suniv-f1c100s.dtsi | 29 ++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi
index 6100d3b75f61..ec9f248ba889 100644
--- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
+++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
@@ -4,6 +4,9 @@
* Copyright 2018 Mesih Kilinc <mesihkilinc@gmail.com>
*/
+#include <dt-bindings/clock/suniv-ccu-f1c100s.h>
+#include <dt-bindings/reset/suniv-ccu-f1c100s.h>
+
/ {
#address-cells = <1>;
#size-cells = <1>;
@@ -140,5 +143,31 @@ uart2: serial@1c25800 {
resets = <&ccu 26>;
status = "disabled";
};
+
+ usb_otg: usb@1c13000 {
+ compatible = "allwinner,suniv-f1c100s-musb";
+ reg = <0x01c13000 0x0400>;
+ clocks = <&ccu CLK_BUS_OTG>;
+ resets = <&ccu RST_BUS_OTG>;
+ interrupts = <26>;
+ interrupt-names = "mc";
+ phys = <&usbphy 0>;
+ phy-names = "usb";
+ extcon = <&usbphy 0>;
+ allwinner,sram = <&otg_sram 1>;
+ status = "disabled";
+ };
+
+ usbphy: phy@1c13400 {
+ compatible = "allwinner,suniv-f1c100s-usb-phy";
+ reg = <0x01c13400 0x10>;
+ reg-names = "phy_ctrl";
+ clocks = <&ccu CLK_USB_PHY0>;
+ clock-names = "usb0_phy";
+ resets = <&ccu RST_USB_PHY0>;
+ reset-names = "usb0_reset";
+ #phy-cells = <1>;
+ status = "disabled";
+ };
};
};
--
2.25.0
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 5/5] ARM: suniv: f1c100s: enable USB on Lichee Pi Nano
2020-02-27 18:14 [PATCH 0/5] Support the Allwinner F1C100s USB stack George Hilliard
` (3 preceding siblings ...)
2020-02-27 18:14 ` [PATCH 4/5] ARM: suniv: add USB-related device nodes George Hilliard
@ 2020-02-27 18:14 ` George Hilliard
4 siblings, 0 replies; 6+ messages in thread
From: George Hilliard @ 2020-02-27 18:14 UTC (permalink / raw)
To: Chen-Yu Tsai, Rob Herring, Mark Rutland
Cc: Icenowy Zheng, linux-kernel, George Hilliard
From: Icenowy Zheng <icenowy@aosc.io>
Lichee Pi Nano has a Micro-USB connector, with its D+, D- pins connected
to the USB pins of the SoC and ID pin connected to PE2 GPIO.
Enable the USB functionality.
This patch depends on the previous change to the F1C100s device tree.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: George Hilliard <thirtythreeforty@gmail.com>
---
.../arm/boot/dts/suniv-f1c100s-licheepi-nano.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts b/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts
index a1154e6c7cb5..c42186e22d45 100644
--- a/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts
+++ b/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts
@@ -6,6 +6,8 @@
/dts-v1/;
#include "suniv-f1c100s.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
/ {
model = "Lichee Pi Nano";
compatible = "licheepi,licheepi-nano", "allwinner,suniv-f1c100s";
@@ -19,8 +21,22 @@ chosen {
};
};
+&otg_sram {
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pe_pins>;
status = "okay";
};
+
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ usb0_id_det-gpio = <&pio 4 2 GPIO_ACTIVE_HIGH>; /* PE2 */
+ status = "okay";
+};
--
2.25.0
^ permalink raw reply [flat|nested] 6+ messages in thread