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From: Andre Przywara <andre.przywara@arm.com>
To: "David S . Miller" <davem@davemloft.net>,
	Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>,
	Robert Hancock <hancock@sedsystems.ca>,
	netdev@vger.kernel.org,
	Russell King <rmk+kernel@arm.linux.org.uk>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Andrew Lunn <andrew@lunn.ch>
Subject: [PATCH v3 07/14] net: axienet: Check for DMA mapping errors
Date: Tue, 24 Mar 2020 13:23:40 +0000	[thread overview]
Message-ID: <20200324132347.23709-8-andre.przywara@arm.com> (raw)
In-Reply-To: <20200324132347.23709-1-andre.przywara@arm.com>

Especially with the default 32-bit DMA mask, DMA buffers are a limited
resource, so their allocation can fail.
So as the DMA API documentation requires, add error checking code after
dma_map_single() calls to catch the case where we run out of "low" memory.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 .../net/ethernet/xilinx/xilinx_axienet_main.c | 31 ++++++++++++++++++-
 1 file changed, 30 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
index 5c1b53944771..736ac1b7a052 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
@@ -248,6 +248,11 @@ static int axienet_dma_bd_init(struct net_device *ndev)
 						     skb->data,
 						     lp->max_frm_size,
 						     DMA_FROM_DEVICE);
+		if (dma_mapping_error(ndev->dev.parent, lp->rx_bd_v[i].phys)) {
+			netdev_err(ndev, "DMA mapping error\n");
+			goto out;
+		}
+
 		lp->rx_bd_v[i].cntrl = lp->max_frm_size;
 	}
 
@@ -679,6 +684,7 @@ axienet_start_xmit(struct sk_buff *skb, struct net_device *ndev)
 	dma_addr_t tail_p;
 	struct axienet_local *lp = netdev_priv(ndev);
 	struct axidma_bd *cur_p;
+	u32 orig_tail_ptr = lp->tx_bd_tail;
 
 	num_frag = skb_shinfo(skb)->nr_frags;
 	cur_p = &lp->tx_bd_v[lp->tx_bd_tail];
@@ -714,9 +720,15 @@ axienet_start_xmit(struct sk_buff *skb, struct net_device *ndev)
 		cur_p->app0 |= 2; /* Tx Full Checksum Offload Enabled */
 	}
 
-	cur_p->cntrl = skb_headlen(skb) | XAXIDMA_BD_CTRL_TXSOF_MASK;
 	cur_p->phys = dma_map_single(ndev->dev.parent, skb->data,
 				     skb_headlen(skb), DMA_TO_DEVICE);
+	if (unlikely(dma_mapping_error(ndev->dev.parent, cur_p->phys))) {
+		if (net_ratelimit())
+			netdev_err(ndev, "TX DMA mapping error\n");
+		ndev->stats.tx_dropped++;
+		return NETDEV_TX_OK;
+	}
+	cur_p->cntrl = skb_headlen(skb) | XAXIDMA_BD_CTRL_TXSOF_MASK;
 
 	for (ii = 0; ii < num_frag; ii++) {
 		if (++lp->tx_bd_tail >= lp->tx_bd_num)
@@ -727,6 +739,16 @@ axienet_start_xmit(struct sk_buff *skb, struct net_device *ndev)
 					     skb_frag_address(frag),
 					     skb_frag_size(frag),
 					     DMA_TO_DEVICE);
+		if (unlikely(dma_mapping_error(ndev->dev.parent, cur_p->phys))) {
+			if (net_ratelimit())
+				netdev_err(ndev, "TX DMA mapping error\n");
+			ndev->stats.tx_dropped++;
+			axienet_free_tx_chain(ndev, orig_tail_ptr, ii + 1,
+					      NULL);
+			lp->tx_bd_tail = orig_tail_ptr;
+
+			return NETDEV_TX_OK;
+		}
 		cur_p->cntrl = skb_frag_size(frag);
 	}
 
@@ -807,6 +829,13 @@ static void axienet_recv(struct net_device *ndev)
 		cur_p->phys = dma_map_single(ndev->dev.parent, new_skb->data,
 					     lp->max_frm_size,
 					     DMA_FROM_DEVICE);
+		if (unlikely(dma_mapping_error(ndev->dev.parent, cur_p->phys))) {
+			if (net_ratelimit())
+				netdev_err(ndev, "RX DMA mapping error\n");
+			dev_kfree_skb(new_skb);
+			return;
+		}
+
 		cur_p->cntrl = lp->max_frm_size;
 		cur_p->status = 0;
 		cur_p->skb = new_skb;
-- 
2.17.1


  parent reply	other threads:[~2020-03-24 13:29 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-24 13:23 [PATCH v3 00/14] net: axienet: Update error handling and add 64-bit DMA support Andre Przywara
2020-03-24 13:23 ` [PATCH v3 01/14] net: xilinx: temac: Relax Kconfig dependencies Andre Przywara
2020-03-24 13:23 ` [PATCH v3 02/14] net: axienet: Convert DMA error handler to a work queue Andre Przywara
2020-03-24 13:23 ` [PATCH v3 03/14] net: axienet: Propagate failure of DMA descriptor setup Andre Przywara
2020-03-24 13:23 ` [PATCH v3 04/14] net: axienet: Fix DMA descriptor cleanup path Andre Przywara
2020-03-24 13:23 ` [PATCH v3 05/14] net: axienet: Improve DMA error handling Andre Przywara
2020-03-24 13:23 ` [PATCH v3 06/14] net: axienet: Factor out TX descriptor chain cleanup Andre Przywara
2020-03-24 13:23 ` Andre Przywara [this message]
2020-03-24 13:23 ` [PATCH v3 08/14] net: axienet: Mark eth_irq as optional Andre Przywara
2020-03-24 13:23 ` [PATCH v3 09/14] net: axienet: Drop MDIO interrupt registers from ethtools dump Andre Przywara
2020-03-24 13:23 ` [PATCH v3 10/14] net: axienet: Add mii-tool support Andre Przywara
2020-03-24 13:43   ` Andrew Lunn
2020-03-24 13:23 ` [PATCH v3 11/14] net: axienet: Wrap DMA pointer writes to prepare for 64 bit Andre Przywara
2020-03-24 13:23 ` [PATCH v3 12/14] net: axienet: Upgrade descriptors to hold 64-bit addresses Andre Przywara
2020-03-24 13:23 ` [PATCH v3 13/14] net: axienet: Autodetect 64-bit DMA capability Andre Przywara
2020-03-24 13:23 ` [PATCH v3 14/14] net: axienet: Allow DMA to beyond 4GB Andre Przywara
2020-03-24 23:33 ` [PATCH v3 00/14] net: axienet: Update error handling and add 64-bit DMA support David Miller

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