From: Andre Przywara <andre.przywara@arm.com>
To: "David S . Miller" <davem@davemloft.net>,
Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>,
Robert Hancock <hancock@sedsystems.ca>,
netdev@vger.kernel.org,
Russell King <rmk+kernel@arm.linux.org.uk>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Andrew Lunn <andrew@lunn.ch>
Subject: [PATCH v3 08/14] net: axienet: Mark eth_irq as optional
Date: Tue, 24 Mar 2020 13:23:41 +0000 [thread overview]
Message-ID: <20200324132347.23709-9-andre.przywara@arm.com> (raw)
In-Reply-To: <20200324132347.23709-1-andre.przywara@arm.com>
According to the DT binding, the Ethernet core interrupt is optional.
Use platform_get_irq_optional() to avoid the error message when the
IRQ is not specified.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
index 736ac1b7a052..60c8cde365f8 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
@@ -1851,7 +1851,7 @@ static int axienet_probe(struct platform_device *pdev)
lp->rx_irq = irq_of_parse_and_map(np, 1);
lp->tx_irq = irq_of_parse_and_map(np, 0);
of_node_put(np);
- lp->eth_irq = platform_get_irq(pdev, 0);
+ lp->eth_irq = platform_get_irq_optional(pdev, 0);
} else {
/* Check for these resources directly on the Ethernet node. */
struct resource *res = platform_get_resource(pdev,
@@ -1859,7 +1859,7 @@ static int axienet_probe(struct platform_device *pdev)
lp->dma_regs = devm_ioremap_resource(&pdev->dev, res);
lp->rx_irq = platform_get_irq(pdev, 1);
lp->tx_irq = platform_get_irq(pdev, 0);
- lp->eth_irq = platform_get_irq(pdev, 2);
+ lp->eth_irq = platform_get_irq_optional(pdev, 2);
}
if (IS_ERR(lp->dma_regs)) {
dev_err(&pdev->dev, "could not map DMA regs\n");
--
2.17.1
next prev parent reply other threads:[~2020-03-24 13:28 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-24 13:23 [PATCH v3 00/14] net: axienet: Update error handling and add 64-bit DMA support Andre Przywara
2020-03-24 13:23 ` [PATCH v3 01/14] net: xilinx: temac: Relax Kconfig dependencies Andre Przywara
2020-03-24 13:23 ` [PATCH v3 02/14] net: axienet: Convert DMA error handler to a work queue Andre Przywara
2020-03-24 13:23 ` [PATCH v3 03/14] net: axienet: Propagate failure of DMA descriptor setup Andre Przywara
2020-03-24 13:23 ` [PATCH v3 04/14] net: axienet: Fix DMA descriptor cleanup path Andre Przywara
2020-03-24 13:23 ` [PATCH v3 05/14] net: axienet: Improve DMA error handling Andre Przywara
2020-03-24 13:23 ` [PATCH v3 06/14] net: axienet: Factor out TX descriptor chain cleanup Andre Przywara
2020-03-24 13:23 ` [PATCH v3 07/14] net: axienet: Check for DMA mapping errors Andre Przywara
2020-03-24 13:23 ` Andre Przywara [this message]
2020-03-24 13:23 ` [PATCH v3 09/14] net: axienet: Drop MDIO interrupt registers from ethtools dump Andre Przywara
2020-03-24 13:23 ` [PATCH v3 10/14] net: axienet: Add mii-tool support Andre Przywara
2020-03-24 13:43 ` Andrew Lunn
2020-03-24 13:23 ` [PATCH v3 11/14] net: axienet: Wrap DMA pointer writes to prepare for 64 bit Andre Przywara
2020-03-24 13:23 ` [PATCH v3 12/14] net: axienet: Upgrade descriptors to hold 64-bit addresses Andre Przywara
2020-03-24 13:23 ` [PATCH v3 13/14] net: axienet: Autodetect 64-bit DMA capability Andre Przywara
2020-03-24 13:23 ` [PATCH v3 14/14] net: axienet: Allow DMA to beyond 4GB Andre Przywara
2020-03-24 23:33 ` [PATCH v3 00/14] net: axienet: Update error handling and add 64-bit DMA support David Miller
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